IT8319043A0 - Metodo per l'accrescimento di silicio monocristallino su uno strato di mascheratura. - Google Patents

Metodo per l'accrescimento di silicio monocristallino su uno strato di mascheratura.

Info

Publication number
IT8319043A0
IT8319043A0 IT8319043A IT1904383A IT8319043A0 IT 8319043 A0 IT8319043 A0 IT 8319043A0 IT 8319043 A IT8319043 A IT 8319043A IT 1904383 A IT1904383 A IT 1904383A IT 8319043 A0 IT8319043 A0 IT 8319043A0
Authority
IT
Italy
Prior art keywords
crystalline silicon
masking layer
growing single
growing
masking
Prior art date
Application number
IT8319043A
Other languages
English (en)
Other versions
IT1173651B (it
Inventor
John Francis Corboy Jr
Lubomir Leon Jastrzebski
Scott Carlton Blackstone
Robert Henry Pagliaro Jr
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23326867&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IT8319043(A0) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8319043A0 publication Critical patent/IT8319043A0/it
Application granted granted Critical
Publication of IT1173651B publication Critical patent/IT1173651B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H01L21/02642—Mask materials other than SiO2 or SiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
IT19043/83A 1982-01-12 1983-01-10 Metodo per l'accrescimento di silicio monocristallino su uno strato di mascheratura IT1173651B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US33895882A 1982-01-12 1982-01-12

Publications (2)

Publication Number Publication Date
IT8319043A0 true IT8319043A0 (it) 1983-01-10
IT1173651B IT1173651B (it) 1987-06-24

Family

ID=23326867

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19043/83A IT1173651B (it) 1982-01-12 1983-01-10 Metodo per l'accrescimento di silicio monocristallino su uno strato di mascheratura

Country Status (8)

Country Link
JP (1) JPS58120595A (it)
DE (1) DE3300716A1 (it)
FR (1) FR2522695B1 (it)
GB (1) GB2113465B (it)
IN (1) IN157312B (it)
IT (1) IT1173651B (it)
SE (1) SE462756B (it)
YU (1) YU6083A (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214424A (ja) * 1985-07-11 1987-01-23 Fujitsu Ltd 半導体装置の製造方法
JP2505754B2 (ja) * 1986-07-11 1996-06-12 キヤノン株式会社 光電変換装置の製造方法
US4829016A (en) * 1987-10-19 1989-05-09 Purdue Research Foundation Bipolar transistor by selective and lateral epitaxial overgrowth
US5403771A (en) * 1990-12-26 1995-04-04 Canon Kabushiki Kaisha Process for producing a solar cell by means of epitaxial growth process
JP3272532B2 (ja) * 1993-12-27 2002-04-08 富士通株式会社 半導体装置の製造方法
JP4832022B2 (ja) * 2005-07-29 2011-12-07 株式会社日立国際電気 基板処理装置
JP2010141079A (ja) * 2008-12-11 2010-06-24 Hitachi Kokusai Electric Inc 半導体装置の製造方法
JP2010147142A (ja) * 2008-12-17 2010-07-01 Hitachi Kokusai Electric Inc 半導体製造方法と装置
US20110272011A1 (en) * 2009-06-05 2011-11-10 Amberwave, Inc. Solar Cell
JP2012054364A (ja) * 2010-08-31 2012-03-15 Nobuyuki Akiyama シリコン薄膜の製造方法、シリコン薄膜太陽電池の製造方法、シリコン薄膜、シリコン薄膜太陽電池
CN115198352B (zh) * 2022-08-24 2024-03-26 西安奕斯伟材料科技股份有限公司 一种外延生长方法及外延晶圆

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL260072A (it) * 1960-01-15
US3746608A (en) * 1963-05-14 1973-07-17 Nitto Boseki Co Ltd Shaped article of synthetic resin having mechanically disordered orientation
DE2059116C3 (de) * 1970-12-01 1974-11-21 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung eines Halbleiterbauelementes
US3945864A (en) * 1974-05-28 1976-03-23 Rca Corporation Method of growing thick expitaxial layers of silicon
DE3008058A1 (de) * 1980-03-03 1981-09-17 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur herstellung einer monolithisch integrierten halbleiterschaltungsanordnung

Also Published As

Publication number Publication date
DE3300716A1 (de) 1983-07-21
GB2113465A (en) 1983-08-03
FR2522695A1 (fr) 1983-09-09
FR2522695B1 (fr) 1987-02-27
SE462756B (sv) 1990-08-27
IN157312B (it) 1986-03-01
JPS58120595A (ja) 1983-07-18
SE8300040D0 (sv) 1983-01-04
JPH0435439B2 (it) 1992-06-11
IT1173651B (it) 1987-06-24
SE8300040L (sv) 1983-07-13
GB2113465B (en) 1986-08-06
YU6083A (en) 1985-10-31
DE3300716C2 (it) 1993-01-21

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960129