IT8125073A0 - Dispositivi a circuito integrato a semiconduttori e procedimento per la sua fabbricazione. - Google Patents

Dispositivi a circuito integrato a semiconduttori e procedimento per la sua fabbricazione.

Info

Publication number
IT8125073A0
IT8125073A0 IT8125073A IT2507381A IT8125073A0 IT 8125073 A0 IT8125073 A0 IT 8125073A0 IT 8125073 A IT8125073 A IT 8125073A IT 2507381 A IT2507381 A IT 2507381A IT 8125073 A0 IT8125073 A0 IT 8125073A0
Authority
IT
Italy
Prior art keywords
procedure
manufacture
integrated circuit
semiconductor integrated
circuit devices
Prior art date
Application number
IT8125073A
Other languages
English (en)
Other versions
IT1139738B (it
Inventor
Akira Muramatsu
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8125073A0 publication Critical patent/IT8125073A0/it
Application granted granted Critical
Publication of IT1139738B publication Critical patent/IT1139738B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • H01L21/8228Complementary devices, e.g. complementary transistors
    • H01L21/82285Complementary vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233Integrated injection logic structures [I2L]
    • H01L27/0244I2L structures integrated in combination with analog structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0828Combination of direct and inverse vertical transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
IT25073/81A 1980-12-01 1981-11-13 Dispositivi a circuito integrato a semiconduttori e procedimento per la sua fabbricazione IT1139738B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55168044A JPS5792858A (en) 1980-12-01 1980-12-01 Semiconductor integrated circuit device and manufacture thereof

Publications (2)

Publication Number Publication Date
IT8125073A0 true IT8125073A0 (it) 1981-11-13
IT1139738B IT1139738B (it) 1986-09-24

Family

ID=15860776

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25073/81A IT1139738B (it) 1980-12-01 1981-11-13 Dispositivi a circuito integrato a semiconduttori e procedimento per la sua fabbricazione

Country Status (8)

Country Link
US (1) US4502201A (it)
JP (1) JPS5792858A (it)
DE (1) DE3146779A1 (it)
FR (1) FR2495379A1 (it)
GB (1) GB2088627B (it)
HK (1) HK43586A (it)
IT (1) IT1139738B (it)
MY (1) MY8600603A (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58210281A (ja) * 1982-05-31 1983-12-07 トステム株式会社 連段窓改装における旧窓枠除去方法
JPS58210283A (ja) * 1982-05-31 1983-12-07 トステム株式会社 連段窓改装における旧窓枠除去方法
US4797372A (en) * 1985-11-01 1989-01-10 Texas Instruments Incorporated Method of making a merge bipolar and complementary metal oxide semiconductor transistor device
US5023690A (en) * 1986-10-24 1991-06-11 Texas Instruments Incorporated Merged bipolar and complementary metal oxide semiconductor transistor device
EP0309788A1 (de) * 1987-09-30 1989-04-05 Siemens Aktiengesellschaft Verfahren zur Erzeugung eines versenkten Oxids
JP2005116973A (ja) * 2003-10-10 2005-04-28 Seiko Epson Corp 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring
DE2455347A1 (de) * 1974-11-22 1976-05-26 Itt Ind Gmbh Deutsche Monolithisch integrierte festkoerperschaltung und herstellungsverfahren
FR2352403A1 (fr) * 1976-05-20 1977-12-16 Comp Generale Electricite Circuit integre rapide
US4157268A (en) * 1977-06-16 1979-06-05 International Business Machines Corporation Localized oxidation enhancement for an integrated injection logic circuit
DE2835632A1 (de) * 1978-08-14 1980-02-28 Bosch Gmbh Robert Monolithisch integrierte schaltung und verfahren zu ihrer herstellung
DE3020609C2 (de) * 1979-05-31 1985-11-07 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zum Herstellen einer integrierten Schaltung mit wenigstens einem I↑2↑L-Element
JPS5696852A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Semiconductor device
DE3029013A1 (de) * 1980-07-31 1982-02-25 Robert Bosch Gmbh, 7000 Stuttgart Hochintegrierte, monolithische halbleiterschaltung

Also Published As

Publication number Publication date
JPS5792858A (en) 1982-06-09
US4502201A (en) 1985-03-05
GB2088627A (en) 1982-06-09
GB2088627B (en) 1985-01-03
DE3146779A1 (de) 1982-09-09
MY8600603A (en) 1986-12-31
HK43586A (en) 1986-06-20
FR2495379A1 (fr) 1982-06-04
IT1139738B (it) 1986-09-24

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19931118