IT201700123399A1 - Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione - Google Patents

Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione

Info

Publication number
IT201700123399A1
IT201700123399A1 IT102017000123399A IT201700123399A IT201700123399A1 IT 201700123399 A1 IT201700123399 A1 IT 201700123399A1 IT 102017000123399 A IT102017000123399 A IT 102017000123399A IT 201700123399 A IT201700123399 A IT 201700123399A IT 201700123399 A1 IT201700123399 A1 IT 201700123399A1
Authority
IT
Italy
Prior art keywords
volatile
memory device
manufacturing procedure
related manufacturing
programmable electrically
Prior art date
Application number
IT102017000123399A
Other languages
English (en)
Inventor
Marcella Carissimi
Marco Pasotti
Chantal Auricchio
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT102017000123399A priority Critical patent/IT201700123399A1/it
Priority to US16/169,763 priority patent/US10755777B2/en
Publication of IT201700123399A1 publication Critical patent/IT201700123399A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0026—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0028—Word-line or row circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
IT102017000123399A 2017-10-30 2017-10-30 Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione IT201700123399A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT102017000123399A IT201700123399A1 (it) 2017-10-30 2017-10-30 Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione
US16/169,763 US10755777B2 (en) 2017-10-30 2018-10-24 Transformed non-reprogrammable memory array devices and methods of manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102017000123399A IT201700123399A1 (it) 2017-10-30 2017-10-30 Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione

Publications (1)

Publication Number Publication Date
IT201700123399A1 true IT201700123399A1 (it) 2019-04-30

Family

ID=61187744

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102017000123399A IT201700123399A1 (it) 2017-10-30 2017-10-30 Dispositivo di memoria non volatile e non programmabile elettricamente e relativo procedimento di fabbricazione

Country Status (2)

Country Link
US (1) US10755777B2 (it)
IT (1) IT201700123399A1 (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11705183B2 (en) * 2020-08-28 2023-07-18 Taiwan Semiconductor Manufacturing Company, Ltd. Word line booster circuit and method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6021079A (en) * 1998-05-13 2000-02-01 Richard Mann Fast, low cost method of developing code for contact programmable ROMs
US20090154221A1 (en) * 2007-12-14 2009-06-18 Samsung Electronics Co., Ltd. Non-Volatile memory device using variable resistance element with an improved write performance
US20140332749A1 (en) * 2013-05-08 2014-11-13 Sony Corporation Semiconductor device and method of manufacturing same
US9305977B1 (en) * 2014-10-28 2016-04-05 Powerchip Technology Corporation Resistive random access memory and method for manufacturing the same
CN206595294U (zh) * 2016-06-24 2017-10-27 意法半导体股份有限公司 相变存储器单元、芯片及电子系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6594192B1 (en) * 2000-08-31 2003-07-15 Stmicroelectronics, Inc. Integrated volatile and non-volatile memory
US9343171B1 (en) * 2015-02-09 2016-05-17 Sandisk Technologies Inc. Reduced erase-verify voltage for first-programmed word line in a memory device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6021079A (en) * 1998-05-13 2000-02-01 Richard Mann Fast, low cost method of developing code for contact programmable ROMs
US20090154221A1 (en) * 2007-12-14 2009-06-18 Samsung Electronics Co., Ltd. Non-Volatile memory device using variable resistance element with an improved write performance
US20140332749A1 (en) * 2013-05-08 2014-11-13 Sony Corporation Semiconductor device and method of manufacturing same
US9305977B1 (en) * 2014-10-28 2016-04-05 Powerchip Technology Corporation Resistive random access memory and method for manufacturing the same
CN206595294U (zh) * 2016-06-24 2017-10-27 意法半导体股份有限公司 相变存储器单元、芯片及电子系统

Also Published As

Publication number Publication date
US10755777B2 (en) 2020-08-25
US20190130970A1 (en) 2019-05-02

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