ITUB20153235A1 - Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile - Google Patents

Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile

Info

Publication number
ITUB20153235A1
ITUB20153235A1 ITUB2015A003235A ITUB20153235A ITUB20153235A1 IT UB20153235 A1 ITUB20153235 A1 IT UB20153235A1 IT UB2015A003235 A ITUB2015A003235 A IT UB2015A003235A IT UB20153235 A ITUB20153235 A IT UB20153235A IT UB20153235 A1 ITUB20153235 A1 IT UB20153235A1
Authority
IT
Italy
Prior art keywords
memory device
volatile memory
row decoder
relative
relative non
Prior art date
Application number
ITUB2015A003235A
Other languages
English (en)
Inventor
Salvatore Polizzi
Giovanni Campardo
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITUB2015A003235A priority Critical patent/ITUB20153235A1/it
Priority to EP16161986.1A priority patent/EP3136397B1/en
Priority to US15/140,770 priority patent/US9679655B2/en
Publication of ITUB20153235A1 publication Critical patent/ITUB20153235A1/it
Priority to US15/605,708 priority patent/US9966145B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/32—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
ITUB2015A003235A 2015-08-26 2015-08-26 Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile ITUB20153235A1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
ITUB2015A003235A ITUB20153235A1 (it) 2015-08-26 2015-08-26 Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile
EP16161986.1A EP3136397B1 (en) 2015-08-26 2016-03-23 Row decoder for a non-volatile memory device and a non-volatile memory device
US15/140,770 US9679655B2 (en) 2015-08-26 2016-04-28 Row decoder for a non-volatile memory device, and non-volatile memory device
US15/605,708 US9966145B2 (en) 2015-08-26 2017-05-25 Row decoder for a non-volatile memory device, and non-volatile memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITUB2015A003235A ITUB20153235A1 (it) 2015-08-26 2015-08-26 Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile

Publications (1)

Publication Number Publication Date
ITUB20153235A1 true ITUB20153235A1 (it) 2017-02-26

Family

ID=54477190

Family Applications (1)

Application Number Title Priority Date Filing Date
ITUB2015A003235A ITUB20153235A1 (it) 2015-08-26 2015-08-26 Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile

Country Status (3)

Country Link
US (2) US9679655B2 (it)
EP (1) EP3136397B1 (it)
IT (1) ITUB20153235A1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10365833B2 (en) 2016-01-22 2019-07-30 Micron Technology, Inc. Apparatuses and methods for encoding and decoding of signal lines for multi-level communication architectures
ITUA20161478A1 (it) * 2016-03-09 2017-09-09 St Microelectronics Srl Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile
US10283187B2 (en) * 2017-07-19 2019-05-07 Micron Technology, Inc. Apparatuses and methods for providing additional drive to multilevel signals representing data
CN114913907A (zh) * 2022-04-02 2022-08-16 长鑫存储技术有限公司 一种反熔丝地址解码电路、操作方法以及存储器

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4360901A (en) * 1980-06-02 1982-11-23 Mostek Corporation Decoder circuit for semiconductor memory
US6122200A (en) * 1997-11-26 2000-09-19 Stmicroelectronics, S.R.L. Row decoder for a flash-EEPROM memory device with the possibility of selective erasing of a sub-group of rows of a sector
US20010053093A1 (en) * 2000-02-16 2001-12-20 Halo Lsi Device & Design Technology Inc. Wordline decoder for flash memory
US6456530B1 (en) * 1999-06-24 2002-09-24 Stmicroelectronics S.R.L. Nonvolatile memory device with hierarchical sector decoding
US20070217280A1 (en) * 2006-03-17 2007-09-20 Northrop Grumman Corporation System and method for reducing latency in a memory array decoder circuit
US20100302894A1 (en) * 2009-05-27 2010-12-02 Nec Electronics Corporation Word line selection circuit and row decoder
US20120163115A1 (en) * 2010-12-22 2012-06-28 Swaroop Ghosh Nor logic word line selection
US20140043929A1 (en) * 2012-08-08 2014-02-13 SK Hynix Inc. Address decoder, semiconductor memory device including the same, method of operating the same
US20140204676A1 (en) * 2013-01-22 2014-07-24 Samsung Electronics Co., Ltd. High voltage switch and a nonvolatile memory device including the same
US20140247081A1 (en) * 2013-03-01 2014-09-04 Arm Limited Combinatorial circuit and method of operation of such a combinatorial circuit

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US5729493A (en) * 1996-08-23 1998-03-17 Motorola Inc. Memory suitable for operation at low power supply voltages and sense amplifier therefor
JPH10269800A (ja) * 1997-03-27 1998-10-09 Mitsubishi Electric Corp 半導体記憶装置
US6026047A (en) * 1998-11-03 2000-02-15 Samsung Electronics Co., Ltd. Integrated circuit memory device with hierarchical work line structure
US7889571B2 (en) * 2008-01-09 2011-02-15 Unity Semiconductor Corporation Buffering systems methods for accessing multiple layers of memory in integrated circuits
US8134856B2 (en) 2008-11-05 2012-03-13 Qualcomm Incorporated Data protection scheme during power-up in spin transfer torque magnetoresistive random access memory
US8400808B2 (en) * 2010-12-16 2013-03-19 Micron Technology, Inc. Phase interpolators and push-pull buffers
JP5653856B2 (ja) * 2011-07-21 2015-01-14 ルネサスエレクトロニクス株式会社 半導体装置
KR101916161B1 (ko) * 2012-03-26 2018-11-08 삼성전자 주식회사 페이지 버퍼, 이를 포함하는 메모리 장치, 및 메모리 장치의 구동 방법
KR101898176B1 (ko) * 2012-05-25 2018-09-12 에스케이하이닉스 주식회사 반도체 메모리 장치의 버퍼 제어회로
US20140126665A1 (en) * 2012-11-06 2014-05-08 Ati Technologies Ulc Output driver with adjustable voltage swing
US8913436B2 (en) * 2013-03-14 2014-12-16 Freescale Semiconductor, Inc. Non-volatile memory (NVM) with word line driver/decoder using a charge pump voltage
US8976618B1 (en) * 2013-10-28 2015-03-10 Qualcomm Incorporated Decoded 2N-bit bitcells in memory for storing decoded bits, and related systems and methods
US9159425B2 (en) * 2013-11-25 2015-10-13 Stmicroelectronics International N.V. Non-volatile memory with reduced sub-threshold leakage during program and erase operations
KR20150072041A (ko) * 2013-12-19 2015-06-29 에스케이하이닉스 주식회사 워드라인 구동 회로
US20150302918A1 (en) * 2014-04-22 2015-10-22 Lsi Corporation Word line decoders for dual rail static random access memories
KR102529968B1 (ko) * 2016-05-11 2023-05-08 삼성전자주식회사 반도체 메모리 장치의 임피던스 조정 회로, 반도체 메모리 장치 및 반도체 메모리 장치의 동작 방법

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4360901A (en) * 1980-06-02 1982-11-23 Mostek Corporation Decoder circuit for semiconductor memory
US6122200A (en) * 1997-11-26 2000-09-19 Stmicroelectronics, S.R.L. Row decoder for a flash-EEPROM memory device with the possibility of selective erasing of a sub-group of rows of a sector
US6456530B1 (en) * 1999-06-24 2002-09-24 Stmicroelectronics S.R.L. Nonvolatile memory device with hierarchical sector decoding
US20010053093A1 (en) * 2000-02-16 2001-12-20 Halo Lsi Device & Design Technology Inc. Wordline decoder for flash memory
US20070217280A1 (en) * 2006-03-17 2007-09-20 Northrop Grumman Corporation System and method for reducing latency in a memory array decoder circuit
US20100302894A1 (en) * 2009-05-27 2010-12-02 Nec Electronics Corporation Word line selection circuit and row decoder
US20120163115A1 (en) * 2010-12-22 2012-06-28 Swaroop Ghosh Nor logic word line selection
US20140043929A1 (en) * 2012-08-08 2014-02-13 SK Hynix Inc. Address decoder, semiconductor memory device including the same, method of operating the same
US20140204676A1 (en) * 2013-01-22 2014-07-24 Samsung Electronics Co., Ltd. High voltage switch and a nonvolatile memory device including the same
US20140247081A1 (en) * 2013-03-01 2014-09-04 Arm Limited Combinatorial circuit and method of operation of such a combinatorial circuit

Also Published As

Publication number Publication date
US9679655B2 (en) 2017-06-13
US20170062055A1 (en) 2017-03-02
US20170263319A1 (en) 2017-09-14
US9966145B2 (en) 2018-05-08
EP3136397A1 (en) 2017-03-01
EP3136397B1 (en) 2019-09-11

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