IT1303204B1 - Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata. - Google Patents

Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata.

Info

Publication number
IT1303204B1
IT1303204B1 IT1998TO001003A ITTO981003A IT1303204B1 IT 1303204 B1 IT1303204 B1 IT 1303204B1 IT 1998TO001003 A IT1998TO001003 A IT 1998TO001003A IT TO981003 A ITTO981003 A IT TO981003A IT 1303204 B1 IT1303204 B1 IT 1303204B1
Authority
IT
Italy
Prior art keywords
memory cells
volatile memory
programming
optimized
precision non
Prior art date
Application number
IT1998TO001003A
Other languages
English (en)
Inventor
Roberto Canegallo
Marco Pasotti
Giovanni Guaitini
Frank Lhermet
Pier Luigi Rolandi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1998TO001003A priority Critical patent/IT1303204B1/it
Publication of ITTO981003A0 publication Critical patent/ITTO981003A0/it
Priority to US09/449,168 priority patent/US6392931B1/en
Publication of ITTO981003A1 publication Critical patent/ITTO981003A1/it
Application granted granted Critical
Publication of IT1303204B1 publication Critical patent/IT1303204B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486—Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
IT1998TO001003A 1998-11-27 1998-11-27 Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata. IT1303204B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT1998TO001003A IT1303204B1 (it) 1998-11-27 1998-11-27 Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata.
US09/449,168 US6392931B1 (en) 1998-11-27 1999-11-24 Method for high precision programming nonvolatile memory cells, with optimized programming speed

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1998TO001003A IT1303204B1 (it) 1998-11-27 1998-11-27 Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata.

Publications (3)

Publication Number Publication Date
ITTO981003A0 ITTO981003A0 (it) 1998-11-27
ITTO981003A1 ITTO981003A1 (it) 2000-05-27
IT1303204B1 true IT1303204B1 (it) 2000-10-30

Family

ID=11417213

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1998TO001003A IT1303204B1 (it) 1998-11-27 1998-11-27 Metodo di programmazione di celle di memoria non volatile ad elevataprecisione, con velocita' di programmazione ottimizzata.

Country Status (2)

Country Link
US (1) US6392931B1 (it)
IT (1) IT1303204B1 (it)

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US6738289B2 (en) * 2001-02-26 2004-05-18 Sandisk Corporation Non-volatile memory with improved programming and method therefor
DE60139670D1 (de) * 2001-04-10 2009-10-08 St Microelectronics Srl Verfahren zur Programmierung nichtflüchtiger Speicherzellen mit Programmier- und Prüfalgorithmus unter Verwendung treppenförmiger Spannungsimpulse mit variablem Stufenabstand
JP3987715B2 (ja) * 2001-12-06 2007-10-10 富士通株式会社 不揮発性半導体メモリおよび不揮発性半導体メモリのプログラム電圧制御方法
US7211843B2 (en) * 2002-04-04 2007-05-01 Broadcom Corporation System and method for programming a memory cell
FR2842344A1 (fr) * 2002-07-11 2004-01-16 St Microelectronics Sa Procede de commande d'une memoire electronique non volatile et dispositif associe
US7139198B2 (en) * 2004-01-27 2006-11-21 Sandisk Corporation Efficient verification for coarse/fine programming of non-volatile memory
KR100632944B1 (ko) * 2004-05-31 2006-10-12 삼성전자주식회사 동작 모드에 따라 프로그램 전압의 증가분을 가변할 수있는 불 휘발성 메모리 장치
ITTO20040470A1 (it) * 2004-07-08 2004-10-08 St Microelectronics Srl Circuito di lettura/verifica di celle di memoria multilivello con tensione di lettura a rampa e relativo metodo di lettura/verifica.
US8823969B1 (en) * 2004-10-18 2014-09-02 Kla-Tencor Corporation Image processing architecture
KR100748553B1 (ko) * 2004-12-20 2007-08-10 삼성전자주식회사 리플-프리 고전압 발생회로 및 방법, 그리고 이를 구비한반도체 메모리 장치
US7339834B2 (en) 2005-06-03 2008-03-04 Sandisk Corporation Starting program voltage shift with cycling of non-volatile memory
US7656710B1 (en) 2005-07-14 2010-02-02 Sau Ching Wong Adaptive operations for nonvolatile memories
KR100705220B1 (ko) * 2005-09-15 2007-04-06 주식회사 하이닉스반도체 프로그램 속도를 증가시키기 위한 플래시 메모리 장치의소거 및 프로그램 방법
KR100660544B1 (ko) * 2005-10-25 2006-12-22 삼성전자주식회사 신뢰성을 향상시킬 수 있는 플래시 메모리 장치
US7512008B2 (en) * 2005-11-30 2009-03-31 Atmel Corporation Circuit to control voltage ramp rate
US7327608B2 (en) * 2006-03-28 2008-02-05 Sandisk Corporation Program time adjustment as function of program voltage for improved programming speed in programming method
US7330373B2 (en) * 2006-03-28 2008-02-12 Sandisk Corporation Program time adjustment as function of program voltage for improved programming speed in memory system
KR100830575B1 (ko) * 2006-09-26 2008-05-21 삼성전자주식회사 플래시 메모리 장치 및 그것의 멀티-블록 소거 방법
US7961511B2 (en) * 2006-09-26 2011-06-14 Sandisk Corporation Hybrid programming methods and systems for non-volatile memory storage elements
KR100780773B1 (ko) * 2006-11-03 2007-11-30 주식회사 하이닉스반도체 플래시 메모리소자의 프로그램 시작 바이어스 설정방법 및이를 이용한 프로그램 방법
KR100868105B1 (ko) * 2006-12-13 2008-11-11 삼성전자주식회사 저항 메모리 장치
US7508715B2 (en) * 2007-07-03 2009-03-24 Sandisk Corporation Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
US7599224B2 (en) * 2007-07-03 2009-10-06 Sandisk Corporation Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
US7800951B2 (en) 2007-08-20 2010-09-21 Marvell World Trade Ltd. Threshold voltage digitizer for array of programmable threshold transistors
US7948802B2 (en) 2007-12-04 2011-05-24 Micron Technology, Inc. Sensing memory cells
US7715235B2 (en) * 2008-08-25 2010-05-11 Sandisk Corporation Non-volatile memory and method for ramp-down programming
US8223551B2 (en) * 2009-02-19 2012-07-17 Micron Technology, Inc. Soft landing for desired program threshold voltage
US8917553B2 (en) 2011-03-25 2014-12-23 Micron Technology, Inc. Non-volatile memory programming
KR20130091909A (ko) * 2012-02-09 2013-08-20 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 프로그램 방법과 이를 이용하는 데이터 처리 시스템
US9082510B2 (en) * 2012-09-14 2015-07-14 Freescale Semiconductor, Inc. Non-volatile memory (NVM) with adaptive write operations
US9911492B2 (en) * 2014-01-17 2018-03-06 International Business Machines Corporation Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period
US9378822B2 (en) * 2014-05-17 2016-06-28 Elite Semiconductor Memory Technology Inc. Method for programming selected memory cells in nonvolatile memory device and nonvolatile memory device thereof
US9384842B1 (en) 2015-05-20 2016-07-05 Freescale Semiconductor, Inc. Method and system to improve soft-programming time in non-volatile memory
KR20200121654A (ko) 2019-04-16 2020-10-26 삼성전자주식회사 문턱전압 산포 특성을 향상한 메모리 컨트롤러, 메모리 시스템 및 그 동작방법
US11315649B2 (en) 2019-04-16 2022-04-26 Samsung Electronics Co., Ltd. Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods

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US3591824A (en) * 1969-03-05 1971-07-06 Madatron Inc Driving means for crt{3 s
FR2768274B1 (fr) * 1997-09-10 1999-11-05 Sgs Thomson Microelectronics Circuit de generation d'une haute tension de programmation ou d'effacement d'une memoire
FR2768846B1 (fr) * 1997-09-19 1999-12-24 Sgs Thomson Microelectronics Procede et circuit de generation de la tension de programmation et d'effacement dans une memoire non volatile
EP0908895A1 (en) * 1997-10-09 1999-04-14 STMicroelectronics S.r.l. Controlled hot-electron writing method for non-volatile memory cells
EP0913832B1 (en) * 1997-11-03 2003-07-23 STMicroelectronics S.r.l. Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory

Also Published As

Publication number Publication date
ITTO981003A0 (it) 1998-11-27
US6392931B1 (en) 2002-05-21
ITTO981003A1 (it) 2000-05-27

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