IT1305182B1 - Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom. - Google Patents

Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom.

Info

Publication number
IT1305182B1
IT1305182B1 IT1998TO000962A ITTO980962A IT1305182B1 IT 1305182 B1 IT1305182 B1 IT 1305182B1 IT 1998TO000962 A IT1998TO000962 A IT 1998TO000962A IT TO980962 A ITTO980962 A IT TO980962A IT 1305182 B1 IT1305182 B1 IT 1305182B1
Authority
IT
Italy
Prior art keywords
analog
eeprom
memory cells
volatile memory
high precision
Prior art date
Application number
IT1998TO000962A
Other languages
English (en)
Inventor
Roberto Canegallo
Marco Pasotti
Pier Luigi Rolandi
Giovanni Guaitini
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1998TO000962A priority Critical patent/IT1305182B1/it
Priority to US09/438,823 priority patent/US6128228A/en
Publication of ITTO980962A1 publication Critical patent/ITTO980962A1/it
Application granted granted Critical
Publication of IT1305182B1 publication Critical patent/IT1305182B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
IT1998TO000962A 1998-11-13 1998-11-13 Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom. IT1305182B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT1998TO000962A IT1305182B1 (it) 1998-11-13 1998-11-13 Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom.
US09/438,823 US6128228A (en) 1998-11-13 1999-11-12 Circuit for high-precision analog reading of nonvolatile memory cells, in particular analog or multilevel flash or EEPROM memory cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1998TO000962A IT1305182B1 (it) 1998-11-13 1998-11-13 Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom.

Publications (2)

Publication Number Publication Date
ITTO980962A1 ITTO980962A1 (it) 2000-05-13
IT1305182B1 true IT1305182B1 (it) 2001-04-10

Family

ID=11417183

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1998TO000962A IT1305182B1 (it) 1998-11-13 1998-11-13 Circuito di lettura analogico ad alta precisione per celle di memorianon volatile, in particolare analogiche o multilivello flash o eeprom.

Country Status (2)

Country Link
US (1) US6128228A (it)
IT (1) IT1305182B1 (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100331847B1 (ko) * 1999-06-29 2002-04-09 박종섭 레퍼런스 메모리셀의 문턱전압 설정회로 및 그를 이용한 문턱전압 설정방법
IT1308857B1 (it) * 1999-10-29 2002-01-11 St Microelectronics Srl Metodo e circuito di lettura per una memoria non volatile.
DE10060432A1 (de) * 2000-12-05 2002-07-25 Infineon Technologies Ag Magnetoresistiver Speicher und Verfahren zu seinem Auslesen
DE10102180A1 (de) * 2001-01-18 2002-05-29 Infineon Technologies Ag Schaltung zur Feststellung des Ladezustands nichtflüchtiger Halbleiterspeicherzellen
US7257025B2 (en) * 2004-12-09 2007-08-14 Saifun Semiconductors Ltd Method for reading non-volatile memory cells
WO2011033701A1 (ja) * 2009-09-16 2011-03-24 パナソニック株式会社 半導体記憶装置
US8693272B2 (en) * 2011-06-30 2014-04-08 Qualcomm Incorporated Sensing circuit
WO2016092416A1 (en) * 2014-12-11 2016-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, memory device, and electronic device
US9893689B2 (en) 2016-06-24 2018-02-13 Stmicroelectronics S.R.L. System and method for a multistage operational amplifier
CN109887536A (zh) * 2019-02-13 2019-06-14 上海新储集成电路有限公司 一种非易失性存储单元结构

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5629890A (en) * 1994-09-14 1997-05-13 Information Storage Devices, Inc. Integrated circuit system for analog signal storing and recovery incorporating read while writing voltage program method

Also Published As

Publication number Publication date
ITTO980962A1 (it) 2000-05-13
US6128228A (en) 2000-10-03

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