ITRM20010282A1 - Circuito di lettura per memoria non volatile. - Google Patents

Circuito di lettura per memoria non volatile.

Info

Publication number
ITRM20010282A1
ITRM20010282A1 IT2001RM000282A ITRM20010282A ITRM20010282A1 IT RM20010282 A1 ITRM20010282 A1 IT RM20010282A1 IT 2001RM000282 A IT2001RM000282 A IT 2001RM000282A IT RM20010282 A ITRM20010282 A IT RM20010282A IT RM20010282 A1 ITRM20010282 A1 IT RM20010282A1
Authority
IT
Italy
Prior art keywords
volatile memory
reading circuit
reading
circuit
volatile
Prior art date
Application number
IT2001RM000282A
Other languages
English (en)
Inventor
Antonino Conte
Oreste Concepito
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT2001RM000282A priority Critical patent/ITRM20010282A1/it
Publication of ITRM20010282A0 publication Critical patent/ITRM20010282A0/it
Priority to US10/154,417 priority patent/US6667908B2/en
Publication of ITRM20010282A1 publication Critical patent/ITRM20010282A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
IT2001RM000282A 2001-05-24 2001-05-24 Circuito di lettura per memoria non volatile. ITRM20010282A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT2001RM000282A ITRM20010282A1 (it) 2001-05-24 2001-05-24 Circuito di lettura per memoria non volatile.
US10/154,417 US6667908B2 (en) 2001-05-24 2002-05-23 Reading circuit for a non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2001RM000282A ITRM20010282A1 (it) 2001-05-24 2001-05-24 Circuito di lettura per memoria non volatile.

Publications (2)

Publication Number Publication Date
ITRM20010282A0 ITRM20010282A0 (it) 2001-05-24
ITRM20010282A1 true ITRM20010282A1 (it) 2002-11-25

Family

ID=11455547

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2001RM000282A ITRM20010282A1 (it) 2001-05-24 2001-05-24 Circuito di lettura per memoria non volatile.

Country Status (2)

Country Link
US (1) US6667908B2 (it)
IT (1) ITRM20010282A1 (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100618840B1 (ko) * 2004-06-29 2006-09-01 삼성전자주식회사 저 전원전압 플래쉬 메모리장치의 감지회로
EP1624462A1 (en) * 2004-08-02 2006-02-08 STMicroelectronics S.r.l. An improved sensing circuit for a semiconductor memory
JP4262227B2 (ja) * 2005-07-22 2009-05-13 シャープ株式会社 半導体記憶装置の読み出し回路
US8773934B2 (en) 2006-09-27 2014-07-08 Silicon Storage Technology, Inc. Power line compensation for flash memory sense amplifiers
FR3059492A1 (fr) * 2016-11-29 2018-06-01 Stmicroelectronics (Grenoble 2) Sas Procede et dispositif d'amplification en mode commun autopolarise et autoregule.

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0676768B1 (en) * 1994-03-28 2000-12-27 STMicroelectronics S.r.l. Reference signal generating method and circuit for differential evaluation of the content of non-volatile memory cells
KR100230747B1 (ko) * 1996-11-22 1999-11-15 김영환 반도체 메모리장치의 저전력 감지증폭기(Low power sense amplifier in a semiconductor device)

Also Published As

Publication number Publication date
US6667908B2 (en) 2003-12-23
ITRM20010282A0 (it) 2001-05-24
US20020186586A1 (en) 2002-12-12

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