IT1290968B1 - Circuito di protezione per un dispositivo a semiconduttore su isolatore - Google Patents

Circuito di protezione per un dispositivo a semiconduttore su isolatore

Info

Publication number
IT1290968B1
IT1290968B1 IT97RM000135A ITRM970135A IT1290968B1 IT 1290968 B1 IT1290968 B1 IT 1290968B1 IT 97RM000135 A IT97RM000135 A IT 97RM000135A IT RM970135 A ITRM970135 A IT RM970135A IT 1290968 B1 IT1290968 B1 IT 1290968B1
Authority
IT
Italy
Prior art keywords
insulator
semiconductor device
protection circuit
protection
circuit
Prior art date
Application number
IT97RM000135A
Other languages
English (en)
Inventor
Jeremy C Smith
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of ITRM970135A1 publication Critical patent/ITRM970135A1/it
Application granted granted Critical
Publication of IT1290968B1 publication Critical patent/IT1290968B1/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62Protection against overvoltage, e.g. fuses, shunts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
IT97RM000135A 1996-04-01 1997-03-12 Circuito di protezione per un dispositivo a semiconduttore su isolatore IT1290968B1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/625,858 US5726844A (en) 1996-04-01 1996-04-01 Protection circuit and a circuit for a semiconductor-on-insulator device

Publications (2)

Publication Number Publication Date
ITRM970135A1 ITRM970135A1 (it) 1998-09-12
IT1290968B1 true IT1290968B1 (it) 1998-12-14

Family

ID=24507904

Family Applications (1)

Application Number Title Priority Date Filing Date
IT97RM000135A IT1290968B1 (it) 1996-04-01 1997-03-12 Circuito di protezione per un dispositivo a semiconduttore su isolatore

Country Status (9)

Country Link
US (1) US5726844A (it)
JP (1) JP3345296B2 (it)
KR (1) KR100387189B1 (it)
DE (1) DE19712834B4 (it)
FR (1) FR2746964B1 (it)
GB (1) GB2311894B (it)
HK (1) HK1003685A1 (it)
IT (1) IT1290968B1 (it)
SG (1) SG63688A1 (it)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046897A (en) * 1997-09-29 2000-04-04 Motorola, Inc. Segmented bus architecture (SBA) for electrostatic discharge (ESD) protection
US6049119A (en) * 1998-05-01 2000-04-11 Motorola, Inc. Protection circuit for a semiconductor device
US6369994B1 (en) * 1998-07-31 2002-04-09 International Business Machines Corporation Method and apparatus for handling an ESD event on an SOI integrated circuit
KR100353471B1 (ko) 1998-12-23 2002-11-18 주식회사 하이닉스반도체 데이터 센스 앰프
US6323522B1 (en) 1999-01-08 2001-11-27 International Business Machines Corporation Silicon on insulator thick oxide structure and process of manufacture
KR100353529B1 (ko) * 1999-06-29 2002-09-26 주식회사 하이닉스반도체 반도체 소자의 정전기 방지 구조
JP2002313947A (ja) * 2001-04-12 2002-10-25 Fuji Electric Co Ltd 半導体装置
US6933567B2 (en) * 2002-05-15 2005-08-23 Texas Instruments Incorporated Substrate pump ESD protection for silicon-on-insulator technologies
US6927957B1 (en) * 2002-07-18 2005-08-09 Newport Fab, Llc Electrostatic discharge clamp
DE10246098A1 (de) * 2002-10-02 2004-04-22 Epcos Ag Schaltungsanordnung
US8000067B1 (en) * 2003-05-15 2011-08-16 Marvell International Ltd. Method and apparatus for improving supply noise rejection
US9029949B2 (en) 2013-09-25 2015-05-12 International Business Machines Corporation Semiconductor-on-insulator (SOI) structures with local heat dissipater(s) and methods

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4063274A (en) * 1976-12-10 1977-12-13 Rca Corporation Integrated circuit device including both N-channel and P-channel insulated gate field effect transistors
US4173022A (en) * 1978-05-09 1979-10-30 Rca Corp. Integrated gate field effect transistors having closed gate structure with controlled avalanche characteristics
US4274193A (en) * 1979-07-05 1981-06-23 Rca Corporation Method for making a closed gate MOS transistor with self-aligned contacts
US4272881A (en) * 1979-07-20 1981-06-16 Rca Corporation Method for making a closed gate MOS transistor with self-aligned contacts with dual passivation layer
JPS6048106B2 (ja) * 1979-12-24 1985-10-25 富士通株式会社 半導体集積回路
US4989057A (en) * 1988-05-26 1991-01-29 Texas Instruments Incorporated ESD protection for SOI circuits
KR920009015A (ko) * 1990-10-29 1992-05-28 김광호 반도체 칩의 보호회로
US5477414A (en) * 1993-05-03 1995-12-19 Xilinx, Inc. ESD protection circuit
US5399507A (en) * 1994-06-27 1995-03-21 Motorola, Inc. Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications

Also Published As

Publication number Publication date
FR2746964A1 (fr) 1997-10-03
JPH1032309A (ja) 1998-02-03
GB2311894A (en) 1997-10-08
US5726844A (en) 1998-03-10
HK1003685A1 (en) 1998-11-06
DE19712834B4 (de) 2007-02-08
GB9706209D0 (en) 1997-05-14
SG63688A1 (en) 1999-03-30
GB2311894B (en) 2000-08-30
KR970072376A (ko) 1997-11-07
JP3345296B2 (ja) 2002-11-18
KR100387189B1 (ko) 2003-08-21
DE19712834A1 (de) 1997-10-30
FR2746964B1 (fr) 2003-10-10
ITRM970135A1 (it) 1998-09-12

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Legal Events

Date Code Title Description
0001 Granted