IT1223571B - Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte - Google Patents

Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Info

Publication number
IT1223571B
IT1223571B IT23134/87A IT2313487A IT1223571B IT 1223571 B IT1223571 B IT 1223571B IT 23134/87 A IT23134/87 A IT 23134/87A IT 2313487 A IT2313487 A IT 2313487A IT 1223571 B IT1223571 B IT 1223571B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
cmos devices
integrated cmos
reduced door
Prior art date
Application number
IT23134/87A
Other languages
English (en)
Other versions
IT8723134A0 (it
Inventor
Carlo Bergonzoni
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT23134/87A priority Critical patent/IT1223571B/it
Publication of IT8723134A0 publication Critical patent/IT8723134A0/it
Priority to US07/284,272 priority patent/US4968639A/en
Priority to EP88120977A priority patent/EP0322665B1/en
Priority to DE8888120977T priority patent/DE3881004T2/de
Priority to JP63324718A priority patent/JP2814092B2/ja
Application granted granted Critical
Publication of IT1223571B publication Critical patent/IT1223571B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
IT23134/87A 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte IT1223571B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte
US07/284,272 US4968639A (en) 1987-12-21 1988-12-14 Process for manufacturing CMOS integrated devices with reduced gate lengths
EP88120977A EP0322665B1 (en) 1987-12-21 1988-12-15 Process for manufacturing cmos integrated devices with reduced gate lengths
DE8888120977T DE3881004T2 (de) 1987-12-21 1988-12-15 Verfahren zum herstellen von integrierten cmos-anordnungen mit verringerten gate-laengen.
JP63324718A JP2814092B2 (ja) 1987-12-21 1988-12-21 長さが縮小されたゲートを有するｃｍｏｓ集積装置を製造するための方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Publications (2)

Publication Number Publication Date
IT8723134A0 IT8723134A0 (it) 1987-12-21
IT1223571B true IT1223571B (it) 1990-09-19

Family

ID=11204147

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Country Status (5)

Country Link
US (1) US4968639A (it)
EP (1) EP0322665B1 (it)
JP (1) JP2814092B2 (it)
DE (1) DE3881004T2 (it)
IT (1) IT1223571B (it)

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Also Published As

Publication number Publication date
DE3881004D1 (de) 1993-06-17
EP0322665A3 (en) 1990-02-14
JPH022667A (ja) 1990-01-08
EP0322665A2 (en) 1989-07-05
US4968639A (en) 1990-11-06
DE3881004T2 (de) 1993-08-19
JP2814092B2 (ja) 1998-10-22
EP0322665B1 (en) 1993-05-12
IT8723134A0 (it) 1987-12-21

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Effective date: 19961227