IT1213192B - Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'. - Google Patents

Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.

Info

Publication number
IT1213192B
IT1213192B IT8421968A IT2196884A IT1213192B IT 1213192 B IT1213192 B IT 1213192B IT 8421968 A IT8421968 A IT 8421968A IT 2196884 A IT2196884 A IT 2196884A IT 1213192 B IT1213192 B IT 1213192B
Authority
IT
Italy
Prior art keywords
igfet
manufacture
response
field effect
integrated circuits
Prior art date
Application number
IT8421968A
Other languages
English (en)
Other versions
IT8421968A0 (it
Inventor
Gianfranco Cerofolini
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT8421968A priority Critical patent/IT1213192B/it
Publication of IT8421968A0 publication Critical patent/IT8421968A0/it
Priority to DE3525550A priority patent/DE3525550C2/de
Priority to GB08517988A priority patent/GB2162999B/en
Priority to FR8511070A priority patent/FR2568058B1/fr
Application granted granted Critical
Publication of IT1213192B publication Critical patent/IT1213192B/it
Priority to US07/470,445 priority patent/US4965219A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
IT8421968A 1984-07-19 1984-07-19 Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'. IT1213192B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8421968A IT1213192B (it) 1984-07-19 1984-07-19 Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.
DE3525550A DE3525550C2 (de) 1984-07-19 1985-07-17 Verfahren zur Herstellung von Feldeffekttransistoren mit isoliertem Gate und hoher Ansprechgeschwindigkeit in integrierten Schaltungen hoher Dichte
GB08517988A GB2162999B (en) 1984-07-19 1985-07-17 Manufacturing insulated gate field effect transistors
FR8511070A FR2568058B1 (fr) 1984-07-19 1985-07-19 Procede pour la fabrication de transistors a effet de champ a grille isolee (igfet) a vitesse de reponse elevee dans des circuits integres de haute densite
US07/470,445 US4965219A (en) 1984-07-19 1990-01-19 Method for the manufacturing of insulated gate field effect transistors (IGFETS) having a high response speed in high density integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8421968A IT1213192B (it) 1984-07-19 1984-07-19 Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.

Publications (2)

Publication Number Publication Date
IT8421968A0 IT8421968A0 (it) 1984-07-19
IT1213192B true IT1213192B (it) 1989-12-14

Family

ID=11189537

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8421968A IT1213192B (it) 1984-07-19 1984-07-19 Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.

Country Status (5)

Country Link
US (1) US4965219A (it)
DE (1) DE3525550C2 (it)
FR (1) FR2568058B1 (it)
GB (1) GB2162999B (it)
IT (1) IT1213192B (it)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1189976B (it) * 1986-02-21 1988-02-10 Sgs Microelettronica Spa Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione
IT1197523B (it) * 1986-10-30 1988-11-30 Sgs Microelettronica Spa Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta
JPH063812B2 (ja) * 1987-07-13 1994-01-12 株式会社東芝 半導体装置の製造方法
JPH01151268A (ja) * 1987-12-08 1989-06-14 Mitsubishi Electric Corp 半導体装置の製造方法
US5079180A (en) * 1988-12-22 1992-01-07 Texas Instruments Incorporated Method of fabricating a raised source/drain transistor
JPH0671073B2 (ja) * 1989-08-29 1994-09-07 株式会社東芝 半導体装置及びその製造方法
US5093275A (en) * 1989-09-22 1992-03-03 The Board Of Regents, The University Of Texas System Method for forming hot-carrier suppressed sub-micron MISFET device
US5248893A (en) * 1990-02-26 1993-09-28 Advanced Micro Devices, Inc. Insulated gate field effect device with a smoothly curved depletion boundary in the vicinity of the channel-free zone
US5118639A (en) * 1990-05-29 1992-06-02 Motorola, Inc. Process for the formation of elevated source and drain structures in a semiconductor device
US5013398A (en) * 1990-05-29 1991-05-07 Micron Technology, Inc. Anisotropic etch method for a sandwich structure
US5266517A (en) * 1991-12-17 1993-11-30 Texas Instruments Incorporated Method for forming a sealed interface on a semiconductor device
US5250454A (en) * 1992-12-10 1993-10-05 Allied Signal Inc. Method for forming thickened source/drain contact regions for field effect transistors
US6437381B1 (en) 2000-04-27 2002-08-20 International Business Machines Corporation Semiconductor memory device with reduced orientation-dependent oxidation in trench structures

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016587A (en) * 1974-12-03 1977-04-05 International Business Machines Corporation Raised source and drain IGFET device and method
US4075045A (en) * 1976-02-09 1978-02-21 International Business Machines Corporation Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps
US4354309A (en) * 1978-12-29 1982-10-19 International Business Machines Corp. Method of manufacturing a metal-insulator-semiconductor device utilizing a graded deposition of polycrystalline silicon
US4252581A (en) * 1979-10-01 1981-02-24 International Business Machines Corporation Selective epitaxy method for making filamentary pedestal transistor
JPS56112757A (en) * 1980-02-08 1981-09-05 Nec Corp Manufacture of semiconductor device
US4287661A (en) * 1980-03-26 1981-09-08 International Business Machines Corporation Method for making an improved polysilicon conductor structure utilizing reactive-ion etching and thermal oxidation
US4488162A (en) * 1980-07-08 1984-12-11 International Business Machines Corporation Self-aligned metal field effect transistor integrated circuits using polycrystalline silicon gate electrodes
US4381956A (en) * 1981-04-06 1983-05-03 Motorola, Inc. Self-aligned buried channel fabrication process
JPS5893223A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体装置の製造方法
JPS58130517A (ja) * 1982-01-29 1983-08-04 Hitachi Ltd 単結晶薄膜の製造方法
JPS58158970A (ja) * 1982-03-16 1983-09-21 Nec Corp 半導体装置の製造方法
US4417385A (en) * 1982-08-09 1983-11-29 General Electric Company Processes for manufacturing insulated-gate semiconductor devices with integral shorts
JPS59161069A (ja) * 1983-03-04 1984-09-11 Oki Electric Ind Co Ltd Ｍｏｓ型半導体装置の製造方法
IT1218344B (it) * 1983-03-31 1990-04-12 Ates Componenti Elettron Processo per l'autoallineamento di un doppio strato di silicio policristallino,in un dispositivo a circuito integrato,mediante un' operazione di ossidazione
US4566914A (en) * 1983-05-13 1986-01-28 Micro Power Systems, Inc. Method of forming localized epitaxy and devices formed therein
CA1197628A (en) * 1984-01-05 1985-12-03 Thomas W. Macelwee Fabrication of stacked mos devices
JPS60152018A (ja) * 1984-01-20 1985-08-10 Agency Of Ind Science & Technol 半導体薄膜結晶層の製造方法
US4577392A (en) * 1984-08-03 1986-03-25 Advanced Micro Devices, Inc. Fabrication technique for integrated circuits
JPS61198780A (ja) * 1985-02-28 1986-09-03 Toshiba Corp 半導体装置の製造方法
US4707456A (en) * 1985-09-18 1987-11-17 Advanced Micro Devices, Inc. Method of making a planar structure containing MOS and bipolar transistors
US4701423A (en) * 1985-12-20 1987-10-20 Ncr Corporation Totally self-aligned CMOS process
US4677736A (en) * 1986-04-17 1987-07-07 General Electric Company Self-aligned inlay transistor with or without source and drain self-aligned metallization extensions

Also Published As

Publication number Publication date
IT8421968A0 (it) 1984-07-19
DE3525550A1 (de) 1986-01-23
DE3525550C2 (de) 1998-09-24
GB2162999A (en) 1986-02-12
US4965219A (en) 1990-10-23
GB8517988D0 (en) 1985-08-21
FR2568058B1 (fr) 1989-08-18
GB2162999B (en) 1987-12-31
FR2568058A1 (fr) 1986-01-24

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