IT8619511A0 - Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione. - Google Patents
Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione.Info
- Publication number
- IT8619511A0 IT8619511A0 IT8619511A IT1951186A IT8619511A0 IT 8619511 A0 IT8619511 A0 IT 8619511A0 IT 8619511 A IT8619511 A IT 8619511A IT 1951186 A IT1951186 A IT 1951186A IT 8619511 A0 IT8619511 A0 IT 8619511A0
- Authority
- IT
- Italy
- Prior art keywords
- planarization
- insulated
- gate
- manufacture
- field effect
- Prior art date
Links
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
- H01L29/41783—Raised source or drain electrodes self aligned with the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT19511/86A IT1189976B (it) | 1986-02-21 | 1986-02-21 | Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione |
JP62035993A JPS62200770A (ja) | 1986-02-21 | 1987-02-20 | 絶縁ゲ−ト電界効果トランジスタの製造方法 |
EP87301545A EP0233791A3 (en) | 1986-02-21 | 1987-02-23 | Insulated gate field effect transistor and method of manufacture thereof |
DE198787301545T DE233791T1 (de) | 1986-02-21 | 1987-02-23 | Isolierter gatter-feldeffekttransistor und dessen herstellungsverfahren. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT19511/86A IT1189976B (it) | 1986-02-21 | 1986-02-21 | Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione |
Publications (3)
Publication Number | Publication Date |
---|---|
IT8619511A0 true IT8619511A0 (it) | 1986-02-21 |
IT8619511A1 IT8619511A1 (it) | 1987-08-21 |
IT1189976B IT1189976B (it) | 1988-02-10 |
Family
ID=11158654
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT19511/86A IT1189976B (it) | 1986-02-21 | 1986-02-21 | Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolato con giunzioni a profondita' nulla mediante planarizzazione |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0233791A3 (it) |
JP (1) | JPS62200770A (it) |
DE (1) | DE233791T1 (it) |
IT (1) | IT1189976B (it) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5015594A (en) * | 1988-10-24 | 1991-05-14 | International Business Machines Corporation | Process of making BiCMOS devices having closely spaced device regions |
EP0422824A1 (en) * | 1989-10-12 | 1991-04-17 | AT&T Corp. | Field-effect transistor with polysilicon window pad |
CA2031254A1 (en) * | 1989-12-01 | 1991-06-02 | Kenji Aoki | Doping method of barrier region in semiconductor device |
EP0505877A2 (en) * | 1991-03-27 | 1992-09-30 | Seiko Instruments Inc. | Impurity doping method with adsorbed diffusion source |
US5422289A (en) * | 1992-04-27 | 1995-06-06 | National Semiconductor Corporation | Method of manufacturing a fully planarized MOSFET and resulting structure |
FR2807208B1 (fr) | 2000-03-29 | 2003-09-05 | St Microelectronics Sa | Dispositif semi-conducteur de memoire non volatile et procede de fabrication correspondant |
US8999175B2 (en) | 2004-01-09 | 2015-04-07 | Ecolab Usa Inc. | Methods for washing and processing fruits, vegetables, and other produce with medium chain peroxycarboxylic acid compositions |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5748248A (en) * | 1980-09-04 | 1982-03-19 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS59202669A (ja) * | 1983-05-02 | 1984-11-16 | Hitachi Ltd | 半導体装置とその製造方法 |
JPS60198863A (ja) * | 1984-03-23 | 1985-10-08 | Nec Corp | Misトランジスタ及びその製造方法 |
JPS6115372A (ja) * | 1984-07-02 | 1986-01-23 | Toshiba Corp | 半導体装置およびその製造方法 |
IT1213192B (it) * | 1984-07-19 | 1989-12-14 | Ates Componenti Elettron | Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'. |
-
1986
- 1986-02-21 IT IT19511/86A patent/IT1189976B/it active
-
1987
- 1987-02-20 JP JP62035993A patent/JPS62200770A/ja active Pending
- 1987-02-23 EP EP87301545A patent/EP0233791A3/en not_active Withdrawn
- 1987-02-23 DE DE198787301545T patent/DE233791T1/de active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0233791A3 (en) | 1988-01-13 |
EP0233791A2 (en) | 1987-08-26 |
IT1189976B (it) | 1988-02-10 |
IT8619511A1 (it) | 1987-08-21 |
DE233791T1 (de) | 1988-03-17 |
JPS62200770A (ja) | 1987-09-04 |
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Legal Events
Date | Code | Title | Description |
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TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970227 |