IT1011452B - Sistema e cella di memoria ad accesso casuale - Google Patents

Sistema e cella di memoria ad accesso casuale

Info

Publication number
IT1011452B
IT1011452B IT51088/74A IT5108874A IT1011452B IT 1011452 B IT1011452 B IT 1011452B IT 51088/74 A IT51088/74 A IT 51088/74A IT 5108874 A IT5108874 A IT 5108874A IT 1011452 B IT1011452 B IT 1011452B
Authority
IT
Italy
Prior art keywords
memory cell
random access
access system
random
cell
Prior art date
Application number
IT51088/74A
Other languages
English (en)
Original Assignee
Teletype Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teletype Corp filed Critical Teletype Corp
Application granted granted Critical
Publication of IT1011452B publication Critical patent/IT1011452B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/02—Shaping pulses by amplifying
    • H03K5/023—Shaping pulses by amplifying using field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
IT51088/74A 1973-05-17 1974-05-17 Sistema e cella di memoria ad accesso casuale IT1011452B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00361377A US3838404A (en) 1973-05-17 1973-05-17 Random access memory system and cell

Publications (1)

Publication Number Publication Date
IT1011452B true IT1011452B (it) 1977-01-20

Family

ID=23421785

Family Applications (1)

Application Number Title Priority Date Filing Date
IT51088/74A IT1011452B (it) 1973-05-17 1974-05-17 Sistema e cella di memoria ad accesso casuale

Country Status (10)

Country Link
US (1) US3838404A (it)
JP (1) JPS5020626A (it)
CA (1) CA1035866A (it)
DE (1) DE2423551A1 (it)
ES (1) ES426347A1 (it)
FR (1) FR2230038B1 (it)
GB (1) GB1451673A (it)
HK (1) HK38777A (it)
IT (1) IT1011452B (it)
NL (1) NL7406453A (it)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2239737B1 (it) * 1973-08-02 1980-12-05 Texas Instruments Inc
US3940747A (en) * 1973-08-02 1976-02-24 Texas Instruments Incorporated High density, high speed random access read-write memory
US3886532A (en) * 1974-05-08 1975-05-27 Sperry Rand Corp Integrated four-phase digital memory circuit with decoders
JPS5121450A (it) * 1974-08-15 1976-02-20 Nippon Electric Co
US3979603A (en) * 1974-08-22 1976-09-07 Texas Instruments Incorporated Regenerative charge detector for charged coupled devices
DE2443529B2 (de) * 1974-09-11 1977-09-01 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zum einschreiben von binaersignalen in ausgewaehlte speicherelemente eines mos-speichers
US3950709A (en) * 1974-10-01 1976-04-13 General Instrument Corporation Amplifier for random access computer memory
US4004284A (en) * 1975-03-05 1977-01-18 Teletype Corporation Binary voltage-differential sensing circuits, and sense/refresh amplifier circuits for random-access memories
US3983413A (en) * 1975-05-02 1976-09-28 Fairchild Camera And Instrument Corporation Balanced differential capacitively decoupled charge sensor
US3992637A (en) * 1975-05-21 1976-11-16 Ibm Corporation Unclocked sense ampllifier
US3983545A (en) * 1975-06-30 1976-09-28 International Business Machines Corporation Random access memory employing single ended sense latch for one device cell
US4031524A (en) * 1975-10-17 1977-06-21 Teletype Corporation Read-only memories, and readout circuits therefor
US4031415A (en) * 1975-10-22 1977-06-21 Texas Instruments Incorporated Address buffer circuit for semiconductor memory
US4010453A (en) * 1975-12-03 1977-03-01 International Business Machines Corporation Stored charge differential sense amplifier
DE2719726A1 (de) * 1976-05-03 1977-11-24 Texas Instruments Inc Speicheranordnung
JPS5810799B2 (ja) * 1976-06-01 1983-02-28 テキサス インスツルメンツ インコ−ポレイテツド 半導体記憶装置
JPS5834039B2 (ja) * 1976-07-07 1983-07-23 三菱電機株式会社 差動増幅回路
JPS5341968A (en) * 1976-09-29 1978-04-15 Hitachi Ltd Semiconductor circuit
US4114070A (en) * 1977-03-22 1978-09-12 Westinghouse Electric Corp. Display panel with simplified thin film interconnect system
US4115871A (en) * 1977-04-19 1978-09-19 National Semiconductor Corporation MOS random memory array
JPS6048073B2 (ja) * 1978-01-26 1985-10-25 日本電気株式会社 メモリ回路
US4413330A (en) * 1981-06-30 1983-11-01 International Business Machines Corporation Apparatus for the reduction of the short-channel effect in a single-polysilicon, one-device FET dynamic RAM array
US4506351A (en) * 1982-06-23 1985-03-19 International Business Machines Corporation One-device random access memory having enhanced sense signal
US4539495A (en) * 1984-05-24 1985-09-03 General Electric Company Voltage comparator
US7023243B2 (en) * 2002-05-08 2006-04-04 University Of Southern California Current source evaluation sense-amplifier
KR102094131B1 (ko) * 2010-02-05 2020-03-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치를 구동하는 방법
JP5770068B2 (ja) 2010-11-12 2015-08-26 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3533089A (en) * 1969-05-16 1970-10-06 Shell Oil Co Single-rail mosfet memory with capacitive storage
US3514765A (en) * 1969-05-23 1970-05-26 Shell Oil Co Sense amplifier comprising cross coupled mosfet's operating in a race mode for single device per bit mosfet memories
US3678473A (en) * 1970-06-04 1972-07-18 Shell Oil Co Read-write circuit for capacitive memory arrays
BE789500A (fr) * 1971-09-30 1973-03-29 Siemens Ag Memoire a semiconducteurs avec elements de memorisation a un seul transistor

Also Published As

Publication number Publication date
FR2230038B1 (it) 1979-09-28
US3838404A (en) 1974-09-24
DE2423551A1 (de) 1974-12-05
JPS5020626A (it) 1975-03-05
FR2230038A1 (it) 1974-12-13
NL7406453A (it) 1974-11-19
ES426347A1 (es) 1976-07-01
HK38777A (en) 1977-07-29
CA1035866A (en) 1978-08-01
GB1451673A (en) 1976-10-06

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