IT1022436B - Cella di memoria perfezionata - Google Patents

Cella di memoria perfezionata

Info

Publication number
IT1022436B
IT1022436B IT27863/74A IT2786374A IT1022436B IT 1022436 B IT1022436 B IT 1022436B IT 27863/74 A IT27863/74 A IT 27863/74A IT 2786374 A IT2786374 A IT 2786374A IT 1022436 B IT1022436 B IT 1022436B
Authority
IT
Italy
Prior art keywords
memory cell
improved memory
improved
cell
memory
Prior art date
Application number
IT27863/74A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1022436B publication Critical patent/IT1022436B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0711—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
    • H01L27/0716—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
IT27863/74A 1973-11-28 1974-09-30 Cella di memoria perfezionata IT1022436B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US419587A US3893085A (en) 1973-11-28 1973-11-28 Read mostly memory cell having bipolar and FAMOS transistor

Publications (1)

Publication Number Publication Date
IT1022436B true IT1022436B (it) 1978-03-20

Family

ID=23662890

Family Applications (1)

Application Number Title Priority Date Filing Date
IT27863/74A IT1022436B (it) 1973-11-28 1974-09-30 Cella di memoria perfezionata

Country Status (7)

Country Link
US (1) US3893085A (it)
JP (1) JPS543587B2 (it)
CA (1) CA1048647A (it)
DE (1) DE2455484C2 (it)
FR (1) FR2252627B1 (it)
GB (1) GB1480940A (it)
IT (1) IT1022436B (it)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087795A (en) * 1974-09-20 1978-05-02 Siemens Aktiengesellschaft Memory field effect storage device
US3938108A (en) * 1975-02-03 1976-02-10 Intel Corporation Erasable programmable read-only memory
US4161039A (en) * 1976-12-15 1979-07-10 Siemens Aktiengesellschaft N-Channel storage FET
DE2706155A1 (de) * 1977-02-14 1978-08-17 Siemens Ag In integrierter technik hergestellter elektronischer speicher
GB2060997A (en) * 1978-01-03 1981-05-07 Erb D M Stratified charge memory divide
US4429326A (en) * 1978-11-29 1984-01-31 Hitachi, Ltd. I2 L Memory with nonvolatile storage
US4247861A (en) * 1979-03-09 1981-01-27 Rca Corporation High performance electrically alterable read-only memory (EAROM)
US4276616A (en) * 1979-04-23 1981-06-30 Fairchild Camera & Instrument Corp. Merged bipolar/field-effect bistable memory cell
EP0021777B1 (en) * 1979-06-18 1983-10-19 Fujitsu Limited Semiconductor non-volatile memory device
US4395723A (en) * 1980-05-27 1983-07-26 Eliyahou Harari Floating substrate dynamic RAM cell with lower punch-through means
US4398338A (en) * 1980-12-24 1983-08-16 Fairchild Camera & Instrument Corp. Fabrication of high speed, nonvolatile, electrically erasable memory cell and system utilizing selective masking, deposition and etching techniques
JPS5885638A (ja) * 1981-11-17 1983-05-23 Ricoh Co Ltd プログラマブルロジツクアレイ
JPS59213167A (ja) * 1983-05-19 1984-12-03 Nec Corp サイリスタ
DE3900426B4 (de) * 1988-01-08 2006-01-19 Kabushiki Kaisha Toshiba, Kawasaki Verfahren zum Betreiben einer Halbleiteranordnung
JPH07123145B2 (ja) * 1990-06-27 1995-12-25 株式会社東芝 半導体集積回路
TW260816B (it) * 1991-12-16 1995-10-21 Philips Nv
JPH11163278A (ja) * 1997-11-25 1999-06-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
FR2799885B1 (fr) * 1999-10-05 2002-01-11 St Microelectronics Sa Potentiometre integre et procede de fabrication correspondant
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3660819A (en) * 1970-06-15 1972-05-02 Intel Corp Floating gate transistor and method for charging and discharging same

Also Published As

Publication number Publication date
DE2455484C2 (de) 1983-01-20
JPS543587B2 (it) 1979-02-24
GB1480940A (en) 1977-07-27
CA1048647A (en) 1979-02-13
US3893085A (en) 1975-07-01
DE2455484A1 (de) 1975-06-05
FR2252627B1 (it) 1979-06-01
FR2252627A1 (it) 1975-06-20
JPS50107830A (it) 1975-08-25

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