IN2014CH03234A - - Google Patents

Info

Publication number
IN2014CH03234A
IN2014CH03234A IN3234CH2014A IN2014CH03234A IN 2014CH03234 A IN2014CH03234 A IN 2014CH03234A IN 3234CH2014 A IN3234CH2014 A IN 3234CH2014A IN 2014CH03234 A IN2014CH03234 A IN 2014CH03234A
Authority
IN
India
Prior art keywords
semiconductor layer
presented
dopant type
semiconductor
region
Prior art date
Application number
Other languages
English (en)
Inventor
Stacey Joy Kennerly
Alexander Viktorovich Bolotnikov
Peter Almern Losee
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of IN2014CH03234A publication Critical patent/IN2014CH03234A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)
IN3234CH2014 2013-07-02 2014-07-01 IN2014CH03234A (enrdf_load_stackoverflow)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/933,366 US10347489B2 (en) 2013-07-02 2013-07-02 Semiconductor devices and methods of manufacture

Publications (1)

Publication Number Publication Date
IN2014CH03234A true IN2014CH03234A (enrdf_load_stackoverflow) 2015-09-18

Family

ID=51410409

Family Applications (1)

Application Number Title Priority Date Filing Date
IN3234CH2014 IN2014CH03234A (enrdf_load_stackoverflow) 2013-07-02 2014-07-01

Country Status (8)

Country Link
US (1) US10347489B2 (enrdf_load_stackoverflow)
JP (1) JP6812087B2 (enrdf_load_stackoverflow)
CN (1) CN104282537B (enrdf_load_stackoverflow)
BR (1) BR102014016375A2 (enrdf_load_stackoverflow)
CA (1) CA2855304C (enrdf_load_stackoverflow)
FR (1) FR3008226B1 (enrdf_load_stackoverflow)
GB (1) GB2517285B (enrdf_load_stackoverflow)
IN (1) IN2014CH03234A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10431654B2 (en) * 2015-06-25 2019-10-01 International Business Machines Corporation Extrinsic base doping for bipolar junction transistors
JP6809330B2 (ja) * 2017-03-28 2021-01-06 豊田合成株式会社 半導体装置の製造方法
DE102018103550B4 (de) * 2018-02-16 2021-08-12 Infineon Technologies Ag Halbleitervorrichtung mit einem halbleiterkörper aus siliziumcarbid
CN111584623A (zh) * 2020-06-02 2020-08-25 吉林华微电子股份有限公司 一种双极结型晶体管器件及其制造方法、电子产品
WO2022096120A1 (en) * 2020-11-06 2022-05-12 Hitachi Energy Switzerland Ag Power semiconductor device and operating method
CN113437154B (zh) * 2021-06-24 2025-03-21 派恩杰半导体(浙江)有限公司 终端有源区同设计的SiC功率器件及其制备方法

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GB2131603B (en) 1982-12-03 1985-12-18 Philips Electronic Associated Semiconductor devices
US6002159A (en) 1996-07-16 1999-12-14 Abb Research Ltd. SiC semiconductor device comprising a pn junction with a voltage absorbing edge
US6956238B2 (en) 2000-10-03 2005-10-18 Cree, Inc. Silicon carbide power metal-oxide semiconductor field effect transistors having a shorting channel and methods of fabricating silicon carbide metal-oxide semiconductor field effect transistors having a shorting channel
US7033950B2 (en) 2001-12-19 2006-04-25 Auburn University Graded junction termination extensions for electronic devices
US9515135B2 (en) 2003-01-15 2016-12-06 Cree, Inc. Edge termination structures for silicon carbide devices
US6927153B2 (en) 2003-02-25 2005-08-09 Xerox Corporation Ion implantation with multiple concentration levels
US7652326B2 (en) 2003-05-20 2010-01-26 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
JP2008010506A (ja) 2006-06-27 2008-01-17 Matsushita Electric Ind Co Ltd 半導体装置
US8377812B2 (en) 2006-11-06 2013-02-19 General Electric Company SiC MOSFETs and self-aligned fabrication methods thereof
US20090227095A1 (en) * 2008-03-05 2009-09-10 Nicholas Bateman Counterdoping for solar cells
US8564088B2 (en) * 2008-08-19 2013-10-22 Infineon Technologies Austria Ag Semiconductor device having variably laterally doped zone with decreasing concentration formed in an edge region
US7800196B2 (en) 2008-09-30 2010-09-21 Northrop Grumman Systems Corporation Semiconductor structure with an electric field stop layer for improved edge termination capability
US8637386B2 (en) * 2009-05-12 2014-01-28 Cree, Inc. Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same
JP5601849B2 (ja) * 2010-02-09 2014-10-08 三菱電機株式会社 炭化珪素半導体装置の製造方法
JP2012064873A (ja) * 2010-09-17 2012-03-29 Rohm Co Ltd 半導体装置およびその製造方法
CN103180959B (zh) * 2010-10-29 2014-07-23 松下电器产业株式会社 半导体元件及其制造方法
JP5787655B2 (ja) * 2010-11-26 2015-09-30 三菱電機株式会社 炭化珪素半導体装置およびその製造方法
WO2012137659A1 (ja) 2011-04-04 2012-10-11 三菱電機株式会社 半導体装置およびその製造方法
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JP5845714B2 (ja) 2011-08-19 2016-01-20 住友電気工業株式会社 炭化珪素半導体装置の製造方法
JP5435129B2 (ja) 2011-10-26 2014-03-05 トヨタ自動車株式会社 半導体装置
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JP2014138048A (ja) * 2013-01-16 2014-07-28 Sumitomo Electric Ind Ltd 炭化珪素半導体装置
US9035395B2 (en) * 2013-04-04 2015-05-19 Monolith Semiconductor, Inc. Semiconductor devices comprising getter layers and methods of making and using the same
US9224816B2 (en) * 2014-05-21 2015-12-29 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device

Also Published As

Publication number Publication date
US20150008446A1 (en) 2015-01-08
GB2517285A (en) 2015-02-18
CN104282537A (zh) 2015-01-14
JP2015015468A (ja) 2015-01-22
JP6812087B2 (ja) 2021-01-13
FR3008226A1 (fr) 2015-01-09
US10347489B2 (en) 2019-07-09
GB2517285B (en) 2017-03-29
GB201411664D0 (en) 2014-08-13
CN104282537B (zh) 2020-10-09
FR3008226B1 (fr) 2019-05-31
CA2855304C (en) 2021-09-28
CA2855304A1 (en) 2015-01-02
BR102014016375A2 (pt) 2016-05-31

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