ID26494A - Sirkuit yang menghasilkan penguncian - Google Patents

Sirkuit yang menghasilkan penguncian

Info

Publication number
ID26494A
ID26494A IDW20002157A ID20002157A ID26494A ID 26494 A ID26494 A ID 26494A ID W20002157 A IDW20002157 A ID W20002157A ID 20002157 A ID20002157 A ID 20002157A ID 26494 A ID26494 A ID 26494A
Authority
ID
Indonesia
Prior art keywords
circuits
produce locking
locking
produce
Prior art date
Application number
IDW20002157A
Other languages
English (en)
Inventor
Shoji Marukawa
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of ID26494A publication Critical patent/ID26494A/id

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10037A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/12Formatting, e.g. arrangement of data block or words on the record carriers
    • G11B20/1217Formatting, e.g. arrangement of data block or words on the record carriers on discs
    • G11B20/1258Formatting, e.g. arrangement of data block or words on the record carriers on discs where blocks are arranged within multiple radial zones, e.g. Zone Bit Recording or Constant Density Recording discs, MCAV discs, MCLV discs

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
IDW20002157A 1999-02-22 2000-02-22 Sirkuit yang menghasilkan penguncian ID26494A (id)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04274299A JP3323824B2 (ja) 1999-02-22 1999-02-22 クロック生成回路

Publications (1)

Publication Number Publication Date
ID26494A true ID26494A (id) 2001-01-11

Family

ID=12644483

Family Applications (1)

Application Number Title Priority Date Filing Date
IDW20002157A ID26494A (id) 1999-02-22 2000-02-22 Sirkuit yang menghasilkan penguncian

Country Status (7)

Country Link
US (1) US6687841B1 (id)
JP (1) JP3323824B2 (id)
KR (1) KR100373378B1 (id)
CN (1) CN1146907C (id)
ID (1) ID26494A (id)
TW (1) TW469702B (id)
WO (1) WO2000051122A1 (id)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60119546T2 (de) * 2000-08-31 2007-05-16 Xilinx, Inc., San Jose Digitale takt-multiplizierer und -teiler mit synchronisierung
CA2442821C (en) * 2001-03-30 2016-08-16 Advanced Metering Data Systems, L.L.C. Enhanced wireless packet data communication system, method, and apparatus applicable to both wide area networks and local area networks
JP3564424B2 (ja) * 2001-05-16 2004-09-08 日本電気通信システム株式会社 Pll回路
JP4542286B2 (ja) * 2001-06-06 2010-09-08 富士通株式会社 並列信号自動位相調整回路
JP3804650B2 (ja) * 2003-10-02 2006-08-02 日本電気株式会社 デジタルpll回路およびこれを用いた情報記録装置
US7515647B2 (en) * 2003-11-28 2009-04-07 Samsung Electronics Co., Ltd Digital frequency converter
JPWO2005091294A1 (ja) * 2004-03-23 2007-08-09 松下電器産業株式会社 クロック信号生成装置、半導体集積回路およびデータ再生方法
JP2005294981A (ja) * 2004-03-31 2005-10-20 Matsushita Electric Ind Co Ltd 位相同期回路
EP2375662B1 (en) 2005-01-20 2018-09-26 Rambus Inc. High-speed signaling systems with adaptable pre-emphasis and equalization
JP4468196B2 (ja) * 2005-02-03 2010-05-26 富士通株式会社 デジタルpll回路
US20060291082A1 (en) * 2005-06-23 2006-12-28 Steve Bounds Extending lock-in range of a PLL or DLL
US7764741B2 (en) * 2005-07-28 2010-07-27 Broadcom Corporation Modulation-type discrimination in a wireless communication network
US8143957B2 (en) * 2006-01-11 2012-03-27 Qualcomm, Incorporated Current-mode gain-splitting dual-path VCO
US8312310B2 (en) * 2007-05-01 2012-11-13 Canon Kabushiki Kaisha Apparatus and method for changing clock frequency and modulation method based on current state
WO2009013860A1 (ja) * 2007-07-23 2009-01-29 Panasonic Corporation デジタルpll装置
CN101548326B (zh) * 2007-09-03 2012-04-11 松下电器产业株式会社 相位比较器以及使用它的时钟生成电路、图像显示装置和再现信号处理装置
DE102008042519A1 (de) * 2008-10-01 2010-04-08 Robert Bosch Gmbh Verfahren zur Regelung einer Grundfrequenz eines spannungsgesteuerten Oszillators als eine Trägerfrequenz eines frequenzmodulierten Signals
WO2010047005A1 (ja) * 2008-10-23 2010-04-29 パナソニック株式会社 デジタルpll回路及び通信装置
CN101488845B (zh) * 2009-02-24 2011-06-15 豪威国际控股有限公司 应用于接收机的多相位匹配系统
WO2011149657A1 (en) * 2010-05-28 2011-12-01 Marvell World Trade Ltd. Method and apparatus for drift compensation in pll
JP5670123B2 (ja) * 2010-08-20 2015-02-18 富士通株式会社 Pllシンセサイザ
US9900144B2 (en) * 2016-04-08 2018-02-20 Analog Bits Inc. Method and circuits for phase-locked loops
JP7193504B2 (ja) * 2020-07-20 2022-12-20 アンリツ株式会社 スペクトラム拡散クロック発生器及びスペクトラム拡散クロック発生方法、パルスパターン発生装置及びパルスパターン発生方法、並びに、誤り率測定装置及び誤り率測定方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5157355A (en) * 1988-09-13 1992-10-20 Canon Kabushiki Kaisha Phase-locked loop device having stability over wide frequency range
JPH06309809A (ja) * 1993-04-27 1994-11-04 Pioneer Electron Corp ディジタル信号再生装置
JPH0778422A (ja) * 1993-09-10 1995-03-20 Fujitsu Ltd クロック抽出回路
US5712635A (en) 1993-09-13 1998-01-27 Analog Devices Inc Digital to analog conversion using nonuniform sample rates
US5835544A (en) 1993-12-24 1998-11-10 Sony Corporation Clock signal reproduction circuit and data reproduction circuit
JP3596827B2 (ja) 1995-07-06 2004-12-02 パイオニア株式会社 ディジタルpll回路
JPH10107623A (ja) * 1996-10-01 1998-04-24 Sony Corp 変換装置および方法、並びに、pll演算装置および方法

Also Published As

Publication number Publication date
JP2000243043A (ja) 2000-09-08
KR100373378B1 (ko) 2003-02-25
CN1294738A (zh) 2001-05-09
US6687841B1 (en) 2004-02-03
WO2000051122A1 (en) 2000-08-31
JP3323824B2 (ja) 2002-09-09
KR20010024975A (ko) 2001-03-26
TW469702B (en) 2001-12-21
WO2000051122A8 (en) 2001-03-29
CN1146907C (zh) 2004-04-21

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