HK57290A - Optimally partitioned regenerative carry lookahead adder - Google Patents

Optimally partitioned regenerative carry lookahead adder

Info

Publication number
HK57290A
HK57290A HK572/90A HK57290A HK57290A HK 57290 A HK57290 A HK 57290A HK 572/90 A HK572/90 A HK 572/90A HK 57290 A HK57290 A HK 57290A HK 57290 A HK57290 A HK 57290A
Authority
HK
Hong Kong
Prior art keywords
carry lookahead
lookahead adder
optimally partitioned
regenerative
partitioned regenerative
Prior art date
Application number
HK572/90A
Other languages
English (en)
Inventor
Thang Vo
Patrick P Gelsinger
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK57290A publication Critical patent/HK57290A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • G06F7/508—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Complex Calculations (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)
HK572/90A 1986-01-21 1990-08-02 Optimally partitioned regenerative carry lookahead adder HK57290A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/820,384 US4737926A (en) 1986-01-21 1986-01-21 Optimally partitioned regenerative carry lookahead adder

Publications (1)

Publication Number Publication Date
HK57290A true HK57290A (en) 1990-08-10

Family

ID=25230620

Family Applications (1)

Application Number Title Priority Date Filing Date
HK572/90A HK57290A (en) 1986-01-21 1990-08-02 Optimally partitioned regenerative carry lookahead adder

Country Status (8)

Country Link
US (1) US4737926A (ja)
JP (1) JP2594428B2 (ja)
KR (1) KR940008613B1 (ja)
CN (1) CN1003678B (ja)
DE (1) DE3700991C2 (ja)
GB (1) GB2185605B (ja)
HK (1) HK57290A (ja)
SG (1) SG34590G (ja)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942548A (en) * 1987-06-25 1990-07-17 International Business Machines Corporation Parallel adder having removed dependencies
EP0310456A3 (en) * 1987-10-01 1990-12-05 Sony Magnescale, Inc. Improvements in audio mixing
WO1989008294A1 (en) * 1988-02-29 1989-09-08 Chopp Computer Corporation Carry generation method and apparatus
US5122982A (en) * 1988-02-29 1992-06-16 Chopp Computer Corporation Carry generation method and apparatus
US4924423A (en) * 1988-04-25 1990-05-08 International Business Machines Corporation High speed parity prediction for binary adders using irregular grouping scheme
US5136539A (en) * 1988-12-16 1992-08-04 Intel Corporation Adder with intermediate carry circuit
US4905180A (en) * 1988-12-16 1990-02-27 Intel Corporation MOS adder with minimum pass gates in carry line
JPH02245926A (ja) * 1989-03-20 1990-10-01 Fujitsu Ltd 論理回路
CA2122139C (en) * 1991-10-24 2000-08-29 David Leroy Sprague Data processing system
US5361370A (en) * 1991-10-24 1994-11-01 Intel Corporation Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port
JPH0651950A (ja) * 1992-07-30 1994-02-25 Mitsubishi Electric Corp 加算回路
EP0590251A2 (en) * 1992-09-22 1994-04-06 Motorola, Inc. High-speed adder
US5483478A (en) * 1992-10-16 1996-01-09 Xilinx, Inc. Method and structure for reducing carry delay for a programmable carry chain
US5337269A (en) * 1993-03-05 1994-08-09 Cyrix Corporation Carry skip adder with independent carry-in and carry skip paths
US5327369A (en) * 1993-03-31 1994-07-05 Intel Corporation Digital adder and method for adding 64-bit, 16-bit and 8-bit words
US5508952A (en) * 1993-10-19 1996-04-16 Kantabutra; Vitit Carry-lookahead/carry-select binary adder
GB2293665A (en) * 1994-09-29 1996-04-03 Texas Instruments Ltd A look-ahead scheme.
US5581497A (en) * 1994-10-17 1996-12-03 Intel Corporation Carry skip adder with enhanced grouping scheme
US5701504A (en) * 1994-12-28 1997-12-23 Intel Corporation Apparatus and method for addition based on Kogge-Stone parallel algorithm
US5619442A (en) * 1995-04-07 1997-04-08 National Semiconductor Corporation Alternating polarity carry look ahead adder circuit
US5978826A (en) * 1995-12-01 1999-11-02 Lucent Techologies Inc. Adder with even/odd 1-bit adder cells
US5854918A (en) * 1996-01-24 1998-12-29 Ricoh Company Ltd. Apparatus and method for self-timed algorithmic execution
US5835782A (en) * 1996-03-04 1998-11-10 Intel Corporation Packed/add and packed subtract operations
US6205463B1 (en) * 1997-05-05 2001-03-20 Intel Corporation Fast 2-input 32-bit domino adder
US6735612B1 (en) * 1997-06-24 2004-05-11 International Business Machines Corporation Carry skip adder
US6405233B1 (en) 1999-06-30 2002-06-11 Intel Corporation Unaligned semaphore adder
DE10050589B4 (de) 2000-02-18 2006-04-06 Hewlett-Packard Development Co., L.P., Houston Vorrichtung und Verfahren zur Verwendung beim Durchführen einer Gleitkomma-Multiplizier-Akkumulier-Operation
US6539413B1 (en) * 2000-03-15 2003-03-25 Agere Systems Inc. Prefix tree adder with efficient sum generation
US6922717B2 (en) 2001-09-28 2005-07-26 Intel Corporation Method and apparatus for performing modular multiplication
US20030065696A1 (en) * 2001-09-28 2003-04-03 Ruehle Michael D. Method and apparatus for performing modular exponentiation
US7325025B2 (en) * 2001-12-18 2008-01-29 Intel Corporation Look-ahead carry adder circuit
US7516173B2 (en) * 2004-08-04 2009-04-07 Intel Corporation Carry-skip adder having merged carry-skip cells with sum cells
KR100867641B1 (ko) * 2006-07-31 2008-11-10 삼성전자주식회사 조건 선택 가산기

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL224679A (ja) * 1957-01-22
US3697735A (en) * 1969-07-22 1972-10-10 Burroughs Corp High-speed parallel binary adder
US3700857A (en) * 1971-04-14 1972-10-24 Bell Telephone Labor Inc Electrical resistance heater
JPS5068036A (ja) * 1973-10-16 1975-06-07
US3987291A (en) * 1975-05-01 1976-10-19 International Business Machines Corporation Parallel digital arithmetic device having a variable number of independent arithmetic zones of variable width and location
IL59907A0 (en) * 1980-04-23 1980-06-30 Nathan Grundland Arithmetic logic unit
JPS6055438A (ja) * 1983-09-05 1985-03-30 Matsushita Electric Ind Co Ltd ２入力加算器
US4623981A (en) * 1983-09-20 1986-11-18 Digital Equipment Corporation ALU with carry length detection
DE3481559D1 (de) * 1983-12-27 1990-04-12 Nec Corp Eine, fuer eine arithmetische operation hoher geschwindigkeit geeignete, uebertragsschaltung.

Also Published As

Publication number Publication date
GB2185605A (en) 1987-07-22
GB2185605B (en) 1989-10-25
JPS62172429A (ja) 1987-07-29
US4737926A (en) 1988-04-12
GB8624162D0 (en) 1986-11-12
CN87100346A (zh) 1987-08-19
DE3700991C2 (de) 1996-02-01
CN1003678B (zh) 1989-03-22
DE3700991A1 (de) 1987-07-23
JP2594428B2 (ja) 1997-03-26
KR870007460A (ko) 1987-08-19
KR940008613B1 (ko) 1994-09-24
SG34590G (en) 1990-07-13

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)