HK1169744A1 - 種集成電路封裝及其組裝方法 - Google Patents

種集成電路封裝及其組裝方法

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Publication number
HK1169744A1
HK1169744A1 HK12110351.8A HK12110351A HK1169744A1 HK 1169744 A1 HK1169744 A1 HK 1169744A1 HK 12110351 A HK12110351 A HK 12110351A HK 1169744 A1 HK1169744 A1 HK 1169744A1
Authority
HK
Hong Kong
Prior art keywords
assembly
integrated circuit
assembly method
circuit assembly
integrated
Prior art date
Application number
HK12110351.8A
Other languages
English (en)
Inventor
愛德華.洛沃
雷澤爾.
.卡恩
埃德蒙.洛沃
Original Assignee
美國博通公司 號
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美國博通公司 號 filed Critical 美國博通公司 號
Publication of HK1169744A1 publication Critical patent/HK1169744A1/zh

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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
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Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620413B2 (en) 2012-10-02 2017-04-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using a standardized carrier in semiconductor packaging
US9496195B2 (en) * 2012-10-02 2016-11-15 STATS ChipPAC Pte. Ltd. Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP
US9704780B2 (en) 2012-12-11 2017-07-11 STATS ChipPAC, Pte. Ltd. Semiconductor device and method of forming low profile fan-out package with vertical interconnection units
US9287204B2 (en) 2012-12-20 2016-03-15 Stats Chippac, Ltd. Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form
US9245770B2 (en) 2012-12-20 2016-01-26 Stats Chippac, Ltd. Semiconductor device and method of simultaneous molding and thermalcompression bonding
US9240331B2 (en) 2012-12-20 2016-01-19 Stats Chippac, Ltd. Semiconductor device and method of making bumpless flipchip interconnect structures
US9704824B2 (en) 2013-01-03 2017-07-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming embedded wafer level chip scale packages
US9721862B2 (en) 2013-01-03 2017-08-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages
KR20150023202A (ko) * 2013-08-23 2015-03-05 강경순 프로세스 모듈 및 그 제조 방법과, 프로세스 모듈을 이용한 기판 처리 방법
TWI658543B (zh) * 2013-12-05 2019-05-01 新加坡商史達晶片有限公司 在半導體封裝中使用標準化載體的半導體裝置及方法
US9524942B2 (en) 2013-12-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-substrate packaging on carrier
US9704769B2 (en) 2014-02-27 2017-07-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP)
US20150303170A1 (en) * 2014-04-17 2015-10-22 Amkor Technology, Inc. Singulated unit substrate for a semicondcutor device
KR101563909B1 (ko) 2014-08-19 2015-10-28 앰코 테크놀로지 코리아 주식회사 패키지 온 패키지 제조 방법
US9972593B2 (en) * 2014-11-07 2018-05-15 Mediatek Inc. Semiconductor package
US9443785B2 (en) * 2014-12-19 2016-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor package
KR102335106B1 (ko) 2015-06-19 2021-12-03 삼성전자 주식회사 발광 소자 패키지 및 그 제조 방법
JP2017054888A (ja) * 2015-09-08 2017-03-16 株式会社ディスコ ウエーハの加工方法
CN105329850B (zh) * 2015-10-21 2017-03-08 美新半导体(无锡)有限公司 圆片级芯片尺寸封装的测试方法
KR101685849B1 (ko) * 2015-11-04 2016-12-13 앰코 테크놀로지 코리아 주식회사 반도체 패키지 모듈 제조 방법 및 이를 이용한 반도체 패키지 모듈
US10535611B2 (en) * 2015-11-20 2020-01-14 Apple Inc. Substrate-less integrated components
KR20170085833A (ko) * 2016-01-15 2017-07-25 삼성전기주식회사 전자 부품 패키지 및 그 제조방법
JP7084702B2 (ja) * 2016-09-02 2022-06-15 アイデックス バイオメトリクス エーエスエー 指紋センサに適したカバー部材を製造する方法
CN109964277B (zh) * 2016-10-20 2023-08-11 德州仪器公司 用于检测及移除有缺陷集成电路封装的方法及设备
US10304716B1 (en) * 2017-12-20 2019-05-28 Powertech Technology Inc. Package structure and manufacturing method thereof
CN116169110A (zh) * 2018-02-24 2023-05-26 华为技术有限公司 一种芯片及封装方法
JP7189672B2 (ja) * 2018-04-18 2022-12-14 新光電気工業株式会社 半導体装置及びその製造方法
US10593630B2 (en) * 2018-05-11 2020-03-17 Advanced Semiconductor Engineering, Inc. Semiconductor package and method for manufacturing the same
WO2019222330A2 (en) * 2018-05-17 2019-11-21 Corning Incorporated Singulated electronic substrates on a flexible or rigid carrier and related methods
US10643957B2 (en) * 2018-08-27 2020-05-05 Nxp B.V. Conformal dummy die
US10755994B2 (en) 2018-10-29 2020-08-25 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and semiconductor substrate
CN109545694B (zh) * 2018-11-13 2020-11-17 无锡中微高科电子有限公司 一种破损基板的模封方法
CN110444480A (zh) * 2019-07-24 2019-11-12 浙江荷清柔性电子技术有限公司 制作柔性芯片的方法、柔性芯片

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5829128A (en) 1993-11-16 1998-11-03 Formfactor, Inc. Method of mounting resilient contact structures to semiconductor devices
US5983493A (en) 1993-11-16 1999-11-16 Formfactor, Inc. Method of temporarily, then permanently, connecting to a semiconductor device
US5884398A (en) 1993-11-16 1999-03-23 Form Factor, Inc. Mounting spring elements on semiconductor devices
US5878486A (en) 1993-11-16 1999-03-09 Formfactor, Inc. Method of burning-in semiconductor devices
US5806181A (en) 1993-11-16 1998-09-15 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US6741085B1 (en) 1993-11-16 2004-05-25 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US5897326A (en) 1993-11-16 1999-04-27 Eldridge; Benjamin N. Method of exercising semiconductor devices
US5852870A (en) 1996-04-24 1998-12-29 Amkor Technology, Inc. Method of making grid array assembly
US5859475A (en) 1996-04-24 1999-01-12 Amkor Technology, Inc. Carrier strip and molded flex circuit ball grid array
US6492203B1 (en) 1997-04-30 2002-12-10 Hitachi Chemical Company, Ltd. Semiconductor device and method of fabrication thereof
US6111324A (en) 1998-02-05 2000-08-29 Asat, Limited Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package
US6214640B1 (en) 1999-02-10 2001-04-10 Tessera, Inc. Method of manufacturing a plurality of semiconductor packages
US6388335B1 (en) * 1999-12-14 2002-05-14 Atmel Corporation Integrated circuit package formed at a wafer level
US6593644B2 (en) * 2001-04-19 2003-07-15 International Business Machines Corporation System of a package fabricated on a semiconductor or dielectric wafer with wiring on one face, vias extending through the wafer, and external connections on the opposing face
US6903278B2 (en) * 2001-06-29 2005-06-07 Intel Corporation Arrangements to provide mechanical stiffening elements to a thin-core or coreless substrate
TW560018B (en) 2001-10-30 2003-11-01 Asia Pacific Microsystems Inc A wafer level packaged structure and method for manufacturing the same
US7023347B2 (en) 2002-08-02 2006-04-04 Symbol Technologies, Inc. Method and system for forming a die frame and for transferring dies therewith
US6903456B2 (en) * 2003-10-08 2005-06-07 Tong Hsing Electric Industries, Ltd. Package carrier having multiple individual ceramic substrates
US7358119B2 (en) 2005-01-12 2008-04-15 Asat Ltd. Thin array plastic package without die attach pad and process for fabricating the same
US7538438B2 (en) * 2005-06-30 2009-05-26 Sandisk Corporation Substrate warpage control and continuous electrical enhancement
US7807505B2 (en) * 2005-08-30 2010-10-05 Micron Technology, Inc. Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods
US7378733B1 (en) 2006-08-29 2008-05-27 Xilinx, Inc. Composite flip-chip package with encased components and method of fabricating same
US7985621B2 (en) * 2006-08-31 2011-07-26 Ati Technologies Ulc Method and apparatus for making semiconductor packages
US8193034B2 (en) * 2006-11-10 2012-06-05 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect structure using stud bumps
US7683380B2 (en) 2007-06-25 2010-03-23 Dicon Fiberoptics, Inc. High light efficiency solid-state light emitting structure and methods to manufacturing the same
US7923298B2 (en) * 2007-09-07 2011-04-12 Micron Technology, Inc. Imager die package and methods of packaging an imager die on a temporary carrier
US20090091025A1 (en) 2007-10-04 2009-04-09 Agency For Science, Technology And Research Method for forming and releasing interconnects
US8124447B2 (en) 2009-04-10 2012-02-28 Advanced Semiconductor Engineering, Inc. Manufacturing method of advanced quad flat non-leaded package
US8143097B2 (en) * 2009-09-23 2012-03-27 Stats Chippac, Ltd. Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof

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TWI541918B (zh) 2016-07-11
KR101402868B1 (ko) 2014-06-03
KR20120109410A (ko) 2012-10-08
US8367475B2 (en) 2013-02-05
CN102709202A (zh) 2012-10-03
CN102709202B (zh) 2015-07-01
TW201301415A (zh) 2013-01-01

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