HK1011115A1 - Method of manufacturing an integrated circuit having a integrated circuit having a charge coupled device - Google Patents

Method of manufacturing an integrated circuit having a integrated circuit having a charge coupled device

Info

Publication number
HK1011115A1
HK1011115A1 HK98111859A HK98111859A HK1011115A1 HK 1011115 A1 HK1011115 A1 HK 1011115A1 HK 98111859 A HK98111859 A HK 98111859A HK 98111859 A HK98111859 A HK 98111859A HK 1011115 A1 HK1011115 A1 HK 1011115A1
Authority
HK
Hong Kong
Prior art keywords
integrated circuit
manufacturing
coupled device
charge coupled
charge
Prior art date
Application number
HK98111859A
Other languages
English (en)
Inventor
Minoru Taguchi
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of HK1011115A1 publication Critical patent/HK1011115A1/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406Combination of charge coupled devices, i.e. CCD, or BBD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/1057Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]
HK98111859A 1991-03-19 1998-11-09 Method of manufacturing an integrated circuit having a integrated circuit having a charge coupled device HK1011115A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3054817A JP2642523B2 (ja) 1991-03-19 1991-03-19 電荷結合素子を持つ半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
HK1011115A1 true HK1011115A1 (en) 1999-07-02

Family

ID=12981249

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98111859A HK1011115A1 (en) 1991-03-19 1998-11-09 Method of manufacturing an integrated circuit having a integrated circuit having a charge coupled device

Country Status (6)

Country Link
US (2) US5321282A (ja)
EP (1) EP0505081B1 (ja)
JP (1) JP2642523B2 (ja)
KR (1) KR920018985A (ja)
DE (1) DE69226212T2 (ja)
HK (1) HK1011115A1 (ja)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567767A (ja) * 1991-03-06 1993-03-19 Matsushita Electron Corp 固体撮像装置およびその製造方法
US5858844A (en) * 1995-06-07 1999-01-12 Advanced Micro Devices, Inc. Method for construction and fabrication of submicron field-effect transistors by optimization of poly oxide process
US5900654A (en) * 1995-07-17 1999-05-04 Spratt; James P. Radiation hardened charge coupled device
US5879954A (en) * 1996-05-20 1999-03-09 Raytheon Company Radiation-hard isoplanar cryo-CMOS process suitable for sub-micron devices
US6440782B1 (en) * 1996-09-03 2002-08-27 Hughes Electronics Radiation-hard silicon cryo-CMOS process suitable for charge-coupled devices, and a device made according to this process
JP3214432B2 (ja) 1998-02-04 2001-10-02 日本電気株式会社 固体撮像装置の製造方法
US6548363B1 (en) * 2000-04-11 2003-04-15 Taiwan Semiconductor Manufacturing Company Method to reduce the gate induced drain leakage current in CMOS devices
JP2002170888A (ja) * 2000-11-30 2002-06-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2005116744A (ja) * 2003-10-07 2005-04-28 Seiko Epson Corp 半導体装置およびその製造方法
US20100193459A1 (en) * 2007-04-12 2010-08-05 Todd Housley Nursing bottle with recessed storage area

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GB384692A (en) * 1930-07-09 1932-12-15 British Thomson Houston Co Ltd Improvements in and relating to oscillographic recording apparatus
US3859717A (en) * 1970-12-21 1975-01-14 Rockwell International Corp Method of manufacturing control electrodes for charge coupled circuits and the like
US3912559A (en) * 1971-11-25 1975-10-14 Suwa Seikosha Kk Complementary MIS-type semiconductor devices and methods for manufacturing same
US3837907A (en) * 1972-03-22 1974-09-24 Bell Telephone Labor Inc Multiple-level metallization for integrated circuits
DE2314260A1 (de) * 1972-05-30 1973-12-13 Ibm Ladungsgekoppelte halbleiteranordnung und verfahren zu ihrer herstellung
US3834959A (en) * 1972-06-30 1974-09-10 Ibm Process for the formation of selfaligned silicon and aluminum gates
US3931674A (en) * 1974-02-08 1976-01-13 Fairchild Camera And Instrument Corporation Self aligned CCD element including two levels of electrodes and method of manufacture therefor
US3911560A (en) * 1974-02-25 1975-10-14 Fairchild Camera Instr Co Method for manufacturing a semiconductor device having self-aligned implanted barriers with narrow gaps between electrodes
JPS519582A (ja) * 1974-07-13 1976-01-26 Oki Electric Ind Co Ltd
US4063992A (en) * 1975-05-27 1977-12-20 Fairchild Camera And Instrument Corporation Edge etch method for producing narrow openings to the surface of materials
US4087832A (en) * 1976-07-02 1978-05-02 International Business Machines Corporation Two-phase charge coupled device structure
US4097885A (en) * 1976-10-15 1978-06-27 Fairchild Camera And Instrument Corp. Compact, two-phase charge-coupled-device structure utilizing multiple layers of conductive material
US4521796A (en) * 1980-12-11 1985-06-04 General Instrument Corporation Memory implant profile for improved channel shielding in electrically alterable read only memory semiconductor device
JPS5885566A (ja) * 1981-11-16 1983-05-21 Toshiba Corp 電荷結合デバイスの製造方法
JPS5952849A (ja) * 1982-09-20 1984-03-27 Fujitsu Ltd 半導体装置の製造方法
FR2533371B1 (fr) * 1982-09-21 1985-12-13 Thomson Csf Structure de grille pour circuit integre comportant des elements du type grille-isolant-semi-conducteur et procede de realisation d'un circuit integre utilisant une telle structure
JPS6035568A (ja) * 1983-08-08 1985-02-23 Hitachi Ltd 半導体集積回路装置
JPS61158170A (ja) * 1984-12-28 1986-07-17 Sony Corp 電荷転送装置の製造方法
US4652339A (en) * 1986-02-24 1987-03-24 The United States Of America As Represented By The Secretary Of The Air Force CCD gate definition process
JPS6436073A (en) * 1987-07-31 1989-02-07 Toshiba Corp Manufacture of semiconductor device
JP3057683B2 (ja) * 1989-02-21 2000-07-04 ソニー株式会社 非破壊読み出し型電荷転送装置とその製造方法
JPH0770615B2 (ja) * 1989-04-13 1995-07-31 株式会社東芝 電荷転送デバイスを含む半導体装置の製造方法
JPH0770703B2 (ja) * 1989-05-22 1995-07-31 株式会社東芝 電荷転送デバイスを含む半導体装置およびその製造方法
JPH0330470A (ja) * 1989-06-28 1991-02-08 Toshiba Corp 半導体装置
US5288651A (en) * 1989-11-09 1994-02-22 Kabushiki Kaisha Toshiba Method of making semiconductor integrated circuit device including bipolar transistors, MOS FETs and CCD
US5260228A (en) * 1990-01-19 1993-11-09 Kabushiki Kaisha Toshiba Method of making a semiconductor device having a charge transfer device, MOSFETs, and bipolar transistors
JPH03245504A (ja) * 1990-02-23 1991-11-01 Sumitomo Heavy Ind Ltd 臨界磁場測定装置用磁石
US5241198A (en) * 1990-11-26 1993-08-31 Matsushita Electronics Corporation Charge-coupled device and solid-state imaging device
KR940009357B1 (ko) * 1991-04-09 1994-10-07 삼성전자주식회사 반도체 장치 및 그 제조방법

Also Published As

Publication number Publication date
EP0505081B1 (en) 1998-07-15
EP0505081A1 (en) 1992-09-23
KR920018985A (ko) 1992-10-22
DE69226212T2 (de) 1999-01-21
US5489545A (en) 1996-02-06
JPH04290447A (ja) 1992-10-15
DE69226212D1 (de) 1998-08-20
JP2642523B2 (ja) 1997-08-20
US5321282A (en) 1994-06-14

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Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20080311