HK1003544A1 - Gain cell dram storage device - Google Patents

Gain cell dram storage device

Info

Publication number
HK1003544A1
HK1003544A1 HK98102640A HK98102640A HK1003544A1 HK 1003544 A1 HK1003544 A1 HK 1003544A1 HK 98102640 A HK98102640 A HK 98102640A HK 98102640 A HK98102640 A HK 98102640A HK 1003544 A1 HK1003544 A1 HK 1003544A1
Authority
HK
Hong Kong
Prior art keywords
doped
covered
ring
gate
dielectric
Prior art date
Application number
HK98102640A
Other languages
English (en)
Inventor
Wolfgang Krautschneider
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of HK1003544A1 publication Critical patent/HK1003544A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
HK98102640A 1995-09-26 1998-03-27 Gain cell dram storage device HK1003544A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19535496 1995-09-26

Publications (1)

Publication Number Publication Date
HK1003544A1 true HK1003544A1 (en) 1998-10-30

Family

ID=7773037

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98102640A HK1003544A1 (en) 1995-09-26 1998-03-27 Gain cell dram storage device

Country Status (8)

Country Link
US (1) US5854500A (ko)
EP (1) EP0766312B1 (ko)
JP (1) JP3737576B2 (ko)
KR (1) KR100439836B1 (ko)
AT (1) ATE212149T1 (ko)
DE (1) DE59608588D1 (ko)
HK (1) HK1003544A1 (ko)
TW (1) TW382806B (ko)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5789306A (en) * 1996-04-18 1998-08-04 Micron Technology, Inc. Dual-masked field isolation
DE19723936A1 (de) * 1997-06-06 1998-12-10 Siemens Ag DRAM-Zellenanordnung und Verfahren zu deren Herstellung
EP0924766B1 (de) * 1997-12-17 2008-02-20 Qimonda AG Speicherzellenanordnung und Verfahren zu deren Herstellung
DE19800340A1 (de) * 1998-01-07 1999-07-15 Siemens Ag Halbleiterspeicheranordnung und Verfahren zu deren Herstellung
DE19812212A1 (de) * 1998-03-19 1999-09-23 Siemens Ag MOS-Transistor in einer Ein-Transistor-Speicherzelle mit einem lokal verdickten Gateoxid und Herstellverfahren
JP4439020B2 (ja) * 1998-03-26 2010-03-24 株式会社東芝 半導体記憶装置及びその製造方法
EP0973203A3 (de) * 1998-07-17 2001-02-14 Infineon Technologies AG Halbleiterschicht mit lateral veränderlicher Dotierung und Verfahren zu dessen Herstellung
DE19911148C1 (de) * 1999-03-12 2000-05-18 Siemens Ag DRAM-Zellenanordnung und Verfahren zu deren Herstellung
DE19961779A1 (de) * 1999-12-21 2001-07-05 Infineon Technologies Ag Integrierte dynamische Speicherzelle mit geringer Ausbreitungsfläche und Verfahren zu deren Herstellung
US6420749B1 (en) * 2000-06-23 2002-07-16 International Business Machines Corporation Trench field shield in trench isolation
JP4236848B2 (ja) * 2001-03-28 2009-03-11 セイコーインスツル株式会社 半導体集積回路装置の製造方法
US6838723B2 (en) * 2002-08-29 2005-01-04 Micron Technology, Inc. Merged MOS-bipolar capacitor memory cell
US7224024B2 (en) * 2002-08-29 2007-05-29 Micron Technology, Inc. Single transistor vertical memory gain cell
US6804142B2 (en) 2002-11-12 2004-10-12 Micron Technology, Inc. 6F2 3-transistor DRAM gain cell
US6956256B2 (en) 2003-03-04 2005-10-18 Micron Technology Inc. Vertical gain cell
US7553740B2 (en) * 2005-05-26 2009-06-30 Fairchild Semiconductor Corporation Structure and method for forming a minimum pitch trench-gate FET with heavy body region
US7459743B2 (en) * 2005-08-24 2008-12-02 International Business Machines Corporation Dual port gain cell with side and top gated read transistor
US7859026B2 (en) * 2006-03-16 2010-12-28 Spansion Llc Vertical semiconductor device
KR100847308B1 (ko) * 2007-02-12 2008-07-21 삼성전자주식회사 반도체 소자 및 그 제조 방법.
DE102007029756A1 (de) * 2007-06-27 2009-01-02 X-Fab Semiconductor Foundries Ag Halbleiterstruktur zur Herstellung eines Trägerwaferkontaktes in grabenisolierten SOI-Scheiben
JP2009094354A (ja) * 2007-10-10 2009-04-30 Toshiba Corp 不揮発性半導体記憶装置
US8878292B2 (en) * 2008-03-02 2014-11-04 Alpha And Omega Semiconductor Incorporated Self-aligned slotted accumulation-mode field effect transistor (AccuFET) structure and method
US9882049B2 (en) * 2014-10-06 2018-01-30 Alpha And Omega Semiconductor Incorporated Self-aligned slotted accumulation-mode field effect transistor (AccuFET) structure and method
US12062656B2 (en) * 2021-10-29 2024-08-13 Nanya Technology Corporation Semiconductor device structure

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2861243B2 (ja) * 1990-04-27 1999-02-24 日本電気株式会社 ダイナミック型ランダムアクセスメモリセル
TW199237B (ko) * 1990-07-03 1993-02-01 Siemens Ag
US5571738A (en) * 1992-09-21 1996-11-05 Advanced Micro Devices, Inc. Method of making poly LDD self-aligned channel transistors
US5308783A (en) * 1992-12-16 1994-05-03 Siemens Aktiengesellschaft Process for the manufacture of a high density cell array of gain memory cells
DE4417150C2 (de) * 1994-05-17 1996-03-14 Siemens Ag Verfahren zur Herstellung einer Anordnung mit selbstverstärkenden dynamischen MOS-Transistorspeicherzellen
US5661322A (en) * 1995-06-02 1997-08-26 Siliconix Incorporated Bidirectional blocking accumulation-mode trench power MOSFET

Also Published As

Publication number Publication date
ATE212149T1 (de) 2002-02-15
JPH09116026A (ja) 1997-05-02
EP0766312A1 (de) 1997-04-02
KR970018605A (ko) 1997-04-30
KR100439836B1 (ko) 2004-12-13
DE59608588D1 (de) 2002-02-21
JP3737576B2 (ja) 2006-01-18
EP0766312B1 (de) 2002-01-16
US5854500A (en) 1998-12-29
TW382806B (en) 2000-02-21

Similar Documents

Publication Publication Date Title
HK1003544A1 (en) Gain cell dram storage device
US7372091B2 (en) Selective epitaxy vertical integrated circuit components
US6686624B2 (en) Vertical one-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region
US6583464B1 (en) Memory cell using amorphous material to stabilize the boundary face between polycrystalline semiconductor material of a capacitor and monocrystalline semiconductor material of a transistor
US5903026A (en) Isolation structure for semiconductor devices
KR100518157B1 (ko) 트렌치 dram셀 제조방법
US4845537A (en) Vertical type MOS transistor and method of formation thereof
US5017504A (en) Vertical type MOS transistor and method of formation thereof
US5663578A (en) Thin film transistor with self-aligned bottom gate
US5561308A (en) Semiconductor device including thin film transistor
US7432560B2 (en) Body-tied-to-source MOSFETs with asymmetrical source and drain regions and methods of fabricating the same
US5348903A (en) Process for fabricating a semiconductor memory cell having thin-film driver transistors overlapping dual wordlines
US4918503A (en) Dynamic random access memory device having a plurality of one transistor type memory cells
US6759702B2 (en) Memory cell with vertical transistor and trench capacitor with reduced burried strap
US20070148930A1 (en) Method of manufacturing a multilayered doped conductor for a contact in an integrated circuit device
KR960016773B1 (en) Buried bit line and cylindrical gate cell and forming method thereof
KR900003891A (ko) 반도체 메모리용 메모리 셀 및 그 제조 방법
US20080237601A1 (en) Transistors and semiconductor constructions
US6383864B2 (en) Memory cell for dynamic random access memory (DRAM)
KR0137666B1 (ko) 트렌치 캐패시터로 이루어지는 다이나믹 반도체 메모리용 3차원 i-트랜지스터 셀 구조 및 그 제조방법
US4860071A (en) Semiconductor memory using trench capacitor
JPH11168202A (ja) メモリセルおよび該メモリセルを形成する方法
KR20000074103A (ko) 디램 셀 어레이 및 그 제조방법
JPH0621365A (ja) 半導体集積回路装置及びその製造方法
KR0172852B1 (ko) 박막트랜지스터 및 그 제조방법

Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20050813