GB2427074B - Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures - Google Patents

Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures

Info

Publication number
GB2427074B
GB2427074B GB0615199A GB0615199A GB2427074B GB 2427074 B GB2427074 B GB 2427074B GB 0615199 A GB0615199 A GB 0615199A GB 0615199 A GB0615199 A GB 0615199A GB 2427074 B GB2427074 B GB 2427074B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
circuit device
power bus
interconnect structures
device utilizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0615199A
Other languages
English (en)
Other versions
GB0615199D0 (en
GB2427074A (en
Inventor
Michael C Ayukawa
Seung H Kang
Roland P Krebs
Kurt George Steiner
Sailesh Mansinh Merchant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=32096363&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=GB2427074(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of GB0615199D0 publication Critical patent/GB0615199D0/en
Publication of GB2427074A publication Critical patent/GB2427074A/en
Application granted granted Critical
Publication of GB2427074B publication Critical patent/GB2427074B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H01L21/768—
    • H01L23/528—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H10W20/0633—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material using subtractive patterning of the conductive members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427—Power or ground buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H01L23/53214—
    • H01L23/53228—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
GB0615199A 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures Expired - Fee Related GB2427074B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US46250403P 2003-04-10 2003-04-10
US10/675,258 US7566964B2 (en) 2003-04-10 2003-09-30 Aluminum pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures
GB0404852A GB2401245B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures

Publications (3)

Publication Number Publication Date
GB0615199D0 GB0615199D0 (en) 2006-09-06
GB2427074A GB2427074A (en) 2006-12-13
GB2427074B true GB2427074B (en) 2007-06-27

Family

ID=32096363

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0615199A Expired - Fee Related GB2427074B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures
GB0404852A Expired - Fee Related GB2401245B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB0404852A Expired - Fee Related GB2401245B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures

Country Status (5)

Country Link
US (1) US7566964B2 (https=)
JP (2) JP5258142B2 (https=)
KR (1) KR101084957B1 (https=)
GB (2) GB2427074B (https=)
TW (1) TWI344685B (https=)

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US7335536B2 (en) * 2005-09-01 2008-02-26 Texas Instruments Incorporated Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
US8319343B2 (en) * 2005-09-21 2012-11-27 Agere Systems Llc Routing under bond pad for the replacement of an interconnect layer
US7952206B2 (en) * 2005-09-27 2011-05-31 Agere Systems Inc. Solder bump structure for flip chip semiconductor devices and method of manufacture therefore
US8552560B2 (en) * 2005-11-18 2013-10-08 Lsi Corporation Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing
TWI288463B (en) * 2006-04-26 2007-10-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate and semiconductor package having the substrate
US7888257B2 (en) * 2007-10-10 2011-02-15 Agere Systems Inc. Integrated circuit package including wire bonds
US8183698B2 (en) * 2007-10-31 2012-05-22 Agere Systems Inc. Bond pad support structure for semiconductor device
US20100289132A1 (en) * 2009-05-13 2010-11-18 Shih-Fu Huang Substrate having embedded single patterned metal layer, and package applied with the same, and methods of manufacturing of the substrate and package
US8786062B2 (en) * 2009-10-14 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package and process for fabricating same
US20110084372A1 (en) * 2009-10-14 2011-04-14 Advanced Semiconductor Engineering, Inc. Package carrier, semiconductor package, and process for fabricating same
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8753917B2 (en) * 2010-12-14 2014-06-17 International Business Machines Corporation Method of fabricating photoconductor-on-active pixel device
JP2013229455A (ja) * 2012-04-26 2013-11-07 Renesas Electronics Corp 半導体装置および半導体装置の製造方法
KR102890492B1 (ko) * 2020-12-17 2025-11-26 삼성전자주식회사 반도체 소자 및 그의 제조 방법
US12593525B2 (en) * 2021-03-11 2026-03-31 Raytheon Company Offset vertical interconnect and compression post for 3D-integrated electrical device

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US5719448A (en) * 1989-03-07 1998-02-17 Seiko Epson Corporation Bonding pad structures for semiconductor integrated circuits
US6204165B1 (en) * 1999-06-24 2001-03-20 International Business Machines Corporation Practical air dielectric interconnections by post-processing standard CMOS wafers
US6261944B1 (en) * 1998-11-24 2001-07-17 Vantis Corporation Method for forming a semiconductor device having high reliability passivation overlying a multi-level interconnect

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US4840923A (en) * 1986-04-30 1989-06-20 International Business Machine Corporation Simultaneous multiple level interconnection process
US5719448A (en) * 1989-03-07 1998-02-17 Seiko Epson Corporation Bonding pad structures for semiconductor integrated circuits
US6261944B1 (en) * 1998-11-24 2001-07-17 Vantis Corporation Method for forming a semiconductor device having high reliability passivation overlying a multi-level interconnect
US6204165B1 (en) * 1999-06-24 2001-03-20 International Business Machines Corporation Practical air dielectric interconnections by post-processing standard CMOS wafers

Also Published As

Publication number Publication date
KR20040089496A (ko) 2004-10-21
JP5258142B2 (ja) 2013-08-07
GB0615199D0 (en) 2006-09-06
TW200503168A (en) 2005-01-16
GB2427074A (en) 2006-12-13
GB0404852D0 (en) 2004-04-07
KR101084957B1 (ko) 2011-11-23
JP2004320018A (ja) 2004-11-11
JP2012054588A (ja) 2012-03-15
US7566964B2 (en) 2009-07-28
TWI344685B (en) 2011-07-01
GB2401245A (en) 2004-11-03
GB2401245B (en) 2006-12-20
US20040201101A1 (en) 2004-10-14

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20170303