GB2401245B - Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures - Google Patents

Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures

Info

Publication number
GB2401245B
GB2401245B GB0404852A GB0404852A GB2401245B GB 2401245 B GB2401245 B GB 2401245B GB 0404852 A GB0404852 A GB 0404852A GB 0404852 A GB0404852 A GB 0404852A GB 2401245 B GB2401245 B GB 2401245B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
power bus
circuit devices
interconnect structures
signal routing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0404852A
Other languages
English (en)
Other versions
GB0404852D0 (en
GB2401245A (en
Inventor
Michael C Ayukawa
Seung H Kang
Roland P Krebs
Kurt George Steiner
Sailesh Mansinh Merchant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=32096363&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=GB2401245(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Priority to GB0615199A priority Critical patent/GB2427074B/en
Publication of GB0404852D0 publication Critical patent/GB0404852D0/en
Publication of GB2401245A publication Critical patent/GB2401245A/en
Application granted granted Critical
Publication of GB2401245B publication Critical patent/GB2401245B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H01L21/768—
    • H01L23/5286—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H10W20/0633—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material using subtractive patterning of the conductive members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427—Power or ground buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H01L23/53214—
    • H01L23/53228—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
GB0404852A 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures Expired - Fee Related GB2401245B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0615199A GB2427074B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US46250403P 2003-04-10 2003-04-10
US10/675,258 US7566964B2 (en) 2003-04-10 2003-09-30 Aluminum pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures

Publications (3)

Publication Number Publication Date
GB0404852D0 GB0404852D0 (en) 2004-04-07
GB2401245A GB2401245A (en) 2004-11-03
GB2401245B true GB2401245B (en) 2006-12-20

Family

ID=32096363

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0404852A Expired - Fee Related GB2401245B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures
GB0615199A Expired - Fee Related GB2427074B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB0615199A Expired - Fee Related GB2427074B (en) 2003-04-10 2004-03-03 Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures

Country Status (5)

Country Link
US (1) US7566964B2 (cg-RX-API-DMAC10.html)
JP (2) JP5258142B2 (cg-RX-API-DMAC10.html)
KR (1) KR101084957B1 (cg-RX-API-DMAC10.html)
GB (2) GB2401245B (cg-RX-API-DMAC10.html)
TW (1) TWI344685B (cg-RX-API-DMAC10.html)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7335536B2 (en) * 2005-09-01 2008-02-26 Texas Instruments Incorporated Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
US8319343B2 (en) * 2005-09-21 2012-11-27 Agere Systems Llc Routing under bond pad for the replacement of an interconnect layer
US7952206B2 (en) * 2005-09-27 2011-05-31 Agere Systems Inc. Solder bump structure for flip chip semiconductor devices and method of manufacture therefore
US8552560B2 (en) * 2005-11-18 2013-10-08 Lsi Corporation Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing
TWI288463B (en) * 2006-04-26 2007-10-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate and semiconductor package having the substrate
US7888257B2 (en) * 2007-10-10 2011-02-15 Agere Systems Inc. Integrated circuit package including wire bonds
KR101360815B1 (ko) * 2007-10-31 2014-02-11 에이저 시스템즈 엘엘시 반도체 디바이스를 위한 본드 패드 지지 구조체
US20100289132A1 (en) * 2009-05-13 2010-11-18 Shih-Fu Huang Substrate having embedded single patterned metal layer, and package applied with the same, and methods of manufacturing of the substrate and package
US20110084372A1 (en) * 2009-10-14 2011-04-14 Advanced Semiconductor Engineering, Inc. Package carrier, semiconductor package, and process for fabricating same
US8786062B2 (en) * 2009-10-14 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package and process for fabricating same
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8753917B2 (en) * 2010-12-14 2014-06-17 International Business Machines Corporation Method of fabricating photoconductor-on-active pixel device
JP2013229455A (ja) * 2012-04-26 2013-11-07 Renesas Electronics Corp 半導体装置および半導体装置の製造方法
KR102890492B1 (ko) * 2020-12-17 2025-11-26 삼성전자주식회사 반도체 소자 및 그의 제조 방법
US12593525B2 (en) 2021-03-11 2026-03-31 Raytheon Company Offset vertical interconnect and compression post for 3D-integrated electrical device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020068441A1 (en) * 1998-12-21 2002-06-06 Mou-Shiung Lin Top layers of metal for high performance IC's
US20020109232A1 (en) * 1998-12-21 2002-08-15 Mou-Shiung Lin Chip structure and process for forming the same
US6451681B1 (en) * 1999-10-04 2002-09-17 Motorola, Inc. Method of forming copper interconnection utilizing aluminum capping film
US6455943B1 (en) * 2001-04-24 2002-09-24 United Microelectronics Corp. Bonding pad structure of semiconductor device having improved bondability

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5851425B2 (ja) 1975-08-22 1983-11-16 株式会社日立製作所 ハンドウタイソウチ
US4840923A (en) 1986-04-30 1989-06-20 International Business Machine Corporation Simultaneous multiple level interconnection process
JPH02163960A (ja) 1988-12-16 1990-06-25 Toshiba Corp 半導体装置
US5719448A (en) 1989-03-07 1998-02-17 Seiko Epson Corporation Bonding pad structures for semiconductor integrated circuits
JPH05226584A (ja) * 1992-02-12 1993-09-03 Yamaha Corp 集積回路装置
US5436412A (en) * 1992-10-30 1995-07-25 International Business Machines Corporation Interconnect structure having improved metallization
JPH0831820A (ja) * 1994-07-19 1996-02-02 Sony Corp 半導体装置
US6331482B1 (en) * 1996-06-26 2001-12-18 Micron Technology, Inc. Method of VLSI contact, trench, and via filling using a germanium underlayer with metallization
US6130161A (en) * 1997-05-30 2000-10-10 International Business Machines Corporation Method of forming copper interconnections with enhanced electromigration resistance and reduced defect sensitivity
JP3660799B2 (ja) * 1997-09-08 2005-06-15 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US6448650B1 (en) * 1998-05-18 2002-09-10 Texas Instruments Incorporated Fine pitch system and method for reinforcing bond pads in semiconductor devices
US6232662B1 (en) * 1998-07-14 2001-05-15 Texas Instruments Incorporated System and method for bonding over active integrated circuits
US6225207B1 (en) 1998-10-01 2001-05-01 Applied Materials, Inc. Techniques for triple and quadruple damascene fabrication
US6018187A (en) * 1998-10-19 2000-01-25 Hewlett-Packard Cmpany Elevated pin diode active pixel sensor including a unique interconnection structure
US6261944B1 (en) 1998-11-24 2001-07-17 Vantis Corporation Method for forming a semiconductor device having high reliability passivation overlying a multi-level interconnect
TW445616B (en) * 1998-12-04 2001-07-11 Koninkl Philips Electronics Nv An integrated circuit device
TW426980B (en) * 1999-01-23 2001-03-21 Lucent Technologies Inc Wire bonding to copper
JP2000216184A (ja) * 1999-01-25 2000-08-04 Sanyo Electric Co Ltd 半導体装置およびその製造方法
US20020000665A1 (en) * 1999-04-05 2002-01-03 Alexander L. Barr Semiconductor device conductive bump and interconnect barrier
JP3542517B2 (ja) * 1999-04-27 2004-07-14 Ｎｅｃエレクトロニクス株式会社 半導体装置
US6107185A (en) * 1999-04-29 2000-08-22 Advanced Micro Devices, Inc. Conductive material adhesion enhancement in damascene process for semiconductors
US6204165B1 (en) 1999-06-24 2001-03-20 International Business Machines Corporation Practical air dielectric interconnections by post-processing standard CMOS wafers
US6410435B1 (en) * 1999-10-01 2002-06-25 Agere Systems Guardian Corp. Process for fabricating copper interconnect for ULSI integrated circuits
US6198170B1 (en) * 1999-12-16 2001-03-06 Conexant Systems, Inc. Bonding pad and support structure and method for their fabrication
US6376353B1 (en) * 2000-07-03 2002-04-23 Chartered Semiconductor Manufacturing Ltd. Aluminum and copper bimetallic bond pad scheme for copper damascene interconnects
AU2001296609A1 (en) * 2000-10-03 2002-04-15 Broadcom Corporation High-density metal capacitor using dual-damascene copper interconnect
US6348732B1 (en) * 2000-11-18 2002-02-19 Advanced Micro Devices, Inc. Amorphized barrier layer for integrated circuit interconnects
JP2002222928A (ja) * 2001-01-29 2002-08-09 Sony Corp 半導体装置
US6649993B2 (en) * 2001-03-16 2003-11-18 Agilent Technologies, Inc. Simplified upper electrode contact structure for PIN diode active pixel sensor
JP2002329722A (ja) * 2001-04-27 2002-11-15 Nec Corp 半導体装置及びその製造方法
US6979896B2 (en) * 2001-10-30 2005-12-27 Intel Corporation Power gridding scheme
US6798073B2 (en) * 2001-12-13 2004-09-28 Megic Corporation Chip structure and process for forming the same
US6614091B1 (en) * 2002-03-13 2003-09-02 Motorola, Inc. Semiconductor device having a wire bond pad and method therefor
US20030218259A1 (en) * 2002-05-21 2003-11-27 Chesire Daniel Patrick Bond pad support structure for a semiconductor device
JP2004111796A (ja) * 2002-09-20 2004-04-08 Hitachi Ltd 半導体装置
US6717270B1 (en) * 2003-04-09 2004-04-06 Motorola, Inc. Integrated circuit die I/O cells

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020068441A1 (en) * 1998-12-21 2002-06-06 Mou-Shiung Lin Top layers of metal for high performance IC's
US20020109232A1 (en) * 1998-12-21 2002-08-15 Mou-Shiung Lin Chip structure and process for forming the same
US6451681B1 (en) * 1999-10-04 2002-09-17 Motorola, Inc. Method of forming copper interconnection utilizing aluminum capping film
US6455943B1 (en) * 2001-04-24 2002-09-24 United Microelectronics Corp. Bonding pad structure of semiconductor device having improved bondability

Also Published As

Publication number Publication date
JP5258142B2 (ja) 2013-08-07
US7566964B2 (en) 2009-07-28
US20040201101A1 (en) 2004-10-14
JP2012054588A (ja) 2012-03-15
GB0404852D0 (en) 2004-04-07
GB2427074A (en) 2006-12-13
TWI344685B (en) 2011-07-01
TW200503168A (en) 2005-01-16
GB2401245A (en) 2004-11-03
KR20040089496A (ko) 2004-10-21
JP2004320018A (ja) 2004-11-11
KR101084957B1 (ko) 2011-11-23
GB0615199D0 (en) 2006-09-06
GB2427074B (en) 2007-06-27

Similar Documents

Publication Publication Date Title
GB2427074B (en) Aluminium pad power bus and signal routing for integrated circuit device utilizing copper technology interconnect structures
IL172668A0 (en) Interconnect structures in integrated circuit devices
AU2003300201A8 (en) Structure and method for bonding to copper interconnect structures
GB2373654B (en) Reducing jitter in mixed-signal integrated circuit devices
TW545875U (en) Heat dissipating device of circuit board
GB0420141D0 (en) Electronic circuits
TWI346378B (en) Wiring circuit board
GB0213249D0 (en) Electronic circuits
TW559461U (en) Heat conducting structure for circuit board
AU2003289122A1 (en) Circuit layout structure
DE60231471D1 (de) Logikschaltung-implementierter Bustreiber
DE50308479D1 (de) Elektrisches Vielschichtbauelement und Schaltungsanordnung
IL160564A0 (en) Interconnect circuit
EP1205972A4 (en) COPPER WIRING
GB2395817B (en) Electronic circuit
EP1489747A4 (en) SEMICONDUCTOR INTEGRATED CIRCUIT
FR2819979B1 (fr) Structure de blindage pour des elements de circuits electroniques
GB0215527D0 (en) Integrated circuit chip and mounting structure
GB2409588B (en) Connecting structure between busbar base and printed circuit board
IL153498A0 (en) Electroless copper metallization of electronic devices
GB2381398B (en) Electrical circuits
GB0209626D0 (en) Integrated circuit layout modification
DE50208373D1 (de) Aus mehreren Leistungsmodulen bestehende elektronische Leistungsschaltung
TW564946U (en) Tool structure of circuit board detection device
TW447775U (en) Insulating structure of laminated chip type electronic device

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20170303