GB1540450A - Self-aligning double polycrystalline silicon etching process - Google Patents

Self-aligning double polycrystalline silicon etching process

Info

Publication number
GB1540450A
GB1540450A GB35950/76A GB3595076A GB1540450A GB 1540450 A GB1540450 A GB 1540450A GB 35950/76 A GB35950/76 A GB 35950/76A GB 3595076 A GB3595076 A GB 3595076A GB 1540450 A GB1540450 A GB 1540450A
Authority
GB
United Kingdom
Prior art keywords
self
etching process
polycrystalline silicon
silicon etching
aligning double
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB35950/76A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB1540450A publication Critical patent/GB1540450A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32131—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
    • H01L21/32132—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Weting (AREA)
GB35950/76A 1975-10-29 1976-08-31 Self-aligning double polycrystalline silicon etching process Expired GB1540450A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62685975A 1975-10-29 1975-10-29

Publications (1)

Publication Number Publication Date
GB1540450A true GB1540450A (en) 1979-02-14

Family

ID=24512170

Family Applications (1)

Application Number Title Priority Date Filing Date
GB35950/76A Expired GB1540450A (en) 1975-10-29 1976-08-31 Self-aligning double polycrystalline silicon etching process

Country Status (4)

Country Link
JP (1) JPS6020908B2 (lm)
DE (1) DE2645014C3 (lm)
FR (1) FR2330146A1 (lm)
GB (1) GB1540450A (lm)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1089299B (it) 1977-01-26 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore
JPS5419372A (en) * 1977-07-14 1979-02-14 Nec Corp Production of semiconductor memory
JPS54109785A (en) * 1978-02-16 1979-08-28 Nec Corp Semiconductor device
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
JPS5550667A (en) * 1978-10-09 1980-04-12 Fujitsu Ltd Method of fabricating double gate mos-type integrated circuit
JPS55105373A (en) * 1978-12-04 1980-08-12 Mostek Corp Metal oxide semiconductor transistor and method of fabricating same
US4240196A (en) * 1978-12-29 1980-12-23 Bell Telephone Laboratories, Incorporated Fabrication of two-level polysilicon devices
DE3037744A1 (de) * 1980-10-06 1982-05-19 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen einer monolithisch integrierten zwei-transistor-speicherzelle in mos-technik
FR2468185A1 (fr) * 1980-10-17 1981-04-30 Intel Corp Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite
JPS5787176A (en) * 1980-11-20 1982-05-31 Seiko Epson Corp Fabrication of semiconductor device
JPS57106171A (en) * 1980-12-24 1982-07-01 Fujitsu Ltd Manufacture of semiconductor device
US4490900A (en) * 1982-01-29 1985-01-01 Seeq Technology, Inc. Method of fabricating an MOS memory array having electrically-programmable and electrically-erasable storage devices incorporated therein
IT1218344B (it) * 1983-03-31 1990-04-12 Ates Componenti Elettron Processo per l'autoallineamento di un doppio strato di silicio policristallino,in un dispositivo a circuito integrato,mediante un' operazione di ossidazione
JPS60187852A (ja) * 1984-03-07 1985-09-25 Shimadzu Corp Νｍｒ　ｃｔ装置における静磁場発生装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3719866A (en) * 1970-12-03 1973-03-06 Ncr Semiconductor memory device
DE2139631C3 (de) * 1971-08-07 1979-05-10 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum Herstellen eines Halbleiterbauelements, bei dem der Rand einer Diffusionszone auf den Rand einer polykristallinen Siliciumelektrode ausgerichtet ist
GB1360770A (en) * 1972-05-30 1974-07-24 Westinghouse Electric Corp N-channel mos transistor
JPS5024084A (lm) * 1973-07-05 1975-03-14

Also Published As

Publication number Publication date
FR2330146A1 (fr) 1977-05-27
FR2330146B1 (lm) 1982-08-27
DE2645014A1 (de) 1977-05-12
DE2645014B2 (de) 1979-06-07
DE2645014C3 (de) 1980-02-28
JPS6020908B2 (ja) 1985-05-24
JPS5259585A (en) 1977-05-17

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee