GB1357210A - Method of manufacturing semiconductor devices - Google Patents

Method of manufacturing semiconductor devices

Info

Publication number
GB1357210A
GB1357210A GB5596071A GB5596071A GB1357210A GB 1357210 A GB1357210 A GB 1357210A GB 5596071 A GB5596071 A GB 5596071A GB 5596071 A GB5596071 A GB 5596071A GB 1357210 A GB1357210 A GB 1357210A
Authority
GB
United Kingdom
Prior art keywords
layer
sio
doping
heating
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5596071A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB5596071A priority Critical patent/GB1357210A/en
Priority to DE2257216A priority patent/DE2257216A1/de
Priority to FR7242338A priority patent/FR2162039B1/fr
Publication of GB1357210A publication Critical patent/GB1357210A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
GB5596071A 1971-12-02 1971-12-02 Method of manufacturing semiconductor devices Expired GB1357210A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB5596071A GB1357210A (en) 1971-12-02 1971-12-02 Method of manufacturing semiconductor devices
DE2257216A DE2257216A1 (de) 1971-12-02 1972-11-22 Halbleiterbauelement mit einer schicht aus siliciumdioxyd
FR7242338A FR2162039B1 (enrdf_load_stackoverflow) 1971-12-02 1972-11-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB5596071A GB1357210A (en) 1971-12-02 1971-12-02 Method of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
GB1357210A true GB1357210A (en) 1974-06-19

Family

ID=10475341

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5596071A Expired GB1357210A (en) 1971-12-02 1971-12-02 Method of manufacturing semiconductor devices

Country Status (3)

Country Link
DE (1) DE2257216A1 (enrdf_load_stackoverflow)
FR (1) FR2162039B1 (enrdf_load_stackoverflow)
GB (1) GB1357210A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4048350A (en) * 1975-09-19 1977-09-13 International Business Machines Corporation Semiconductor device having reduced surface leakage and methods of manufacture

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3360695A (en) * 1965-08-02 1967-12-26 Sprague Electric Co Induced region semiconductor device
US3607469A (en) * 1969-03-27 1971-09-21 Nat Semiconductor Corp Method of obtaining low concentration impurity predeposition on a semiconductive wafer

Also Published As

Publication number Publication date
DE2257216A1 (de) 1973-06-14
FR2162039B1 (enrdf_load_stackoverflow) 1976-04-23
FR2162039A1 (enrdf_load_stackoverflow) 1973-07-13

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]