GB1305010A - - Google Patents
Info
- Publication number
- GB1305010A GB1305010A GB2323371*A GB2323371A GB1305010A GB 1305010 A GB1305010 A GB 1305010A GB 2323371 A GB2323371 A GB 2323371A GB 1305010 A GB1305010 A GB 1305010A
- Authority
- GB
- United Kingdom
- Prior art keywords
- level
- interconnection metallization
- usable cells
- terminals
- heading
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
- H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US76245968A | 1968-09-25 | 1968-09-25 | |
| US1686770A | 1970-03-05 | 1970-03-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1305010A true GB1305010A (enExample) | 1973-01-31 |
Family
ID=26689162
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB2323371*A Expired GB1305010A (enExample) | 1968-09-25 | 1971-04-19 |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1305010A (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1983004109A1 (en) * | 1982-05-17 | 1983-11-24 | Motorola, Inc. | Pad for accelerated memory test |
| US4479088A (en) * | 1981-01-16 | 1984-10-23 | Burroughs Corporation | Wafer including test lead connected to ground for testing networks thereon |
| GB2153590A (en) * | 1984-02-01 | 1985-08-21 | Ramesh Chandra Varshney | Matrix of functional circuits on a semiconductor wafer |
-
1971
- 1971-04-19 GB GB2323371*A patent/GB1305010A/en not_active Expired
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4479088A (en) * | 1981-01-16 | 1984-10-23 | Burroughs Corporation | Wafer including test lead connected to ground for testing networks thereon |
| WO1983004109A1 (en) * | 1982-05-17 | 1983-11-24 | Motorola, Inc. | Pad for accelerated memory test |
| US4465973A (en) * | 1982-05-17 | 1984-08-14 | Motorola, Inc. | Pad for accelerated memory test |
| GB2153590A (en) * | 1984-02-01 | 1985-08-21 | Ramesh Chandra Varshney | Matrix of functional circuits on a semiconductor wafer |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PE20 | Patent expired after termination of 20 years |