FR3107983B1 - Dispositif de surveillance d'un circuit digital - Google Patents

Dispositif de surveillance d'un circuit digital Download PDF

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Publication number
FR3107983B1
FR3107983B1 FR2002212A FR2002212A FR3107983B1 FR 3107983 B1 FR3107983 B1 FR 3107983B1 FR 2002212 A FR2002212 A FR 2002212A FR 2002212 A FR2002212 A FR 2002212A FR 3107983 B1 FR3107983 B1 FR 3107983B1
Authority
FR
France
Prior art keywords
circuit
monitoring
digital circuit
component
chain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2002212A
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English (en)
Other versions
FR3107983A1 (fr
Inventor
Gomez Ricardo Gomez
Sylvain Clerc
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR2002212A priority Critical patent/FR3107983B1/fr
Priority to US17/189,984 priority patent/US20210278461A1/en
Priority to CN202110239520.8A priority patent/CN113359015A/zh
Publication of FR3107983A1 publication Critical patent/FR3107983A1/fr
Application granted granted Critical
Publication of FR3107983B1 publication Critical patent/FR3107983B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/023Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31702Testing digital circuits including elements other than semiconductor transistors, e.g. biochips, nanofabrics, mems, chips with magnetic elements
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage
    • G01R31/3016Delay or race condition test, e.g. race hazard test
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31725Timing aspects, e.g. clock distribution, skew, propagation delay
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31725Timing aspects, e.g. clock distribution, skew, propagation delay
    • G01R31/31726Synchronization, e.g. of test, clock or strobe signals; Signals in different clock domains; Generation of Vernier signals; Comparison and adjustment of the signals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3177Testing of logic operation, e.g. by logic analysers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03Astable circuits
    • H03K3/0315Ring oscillators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

Dispositif de surveillance d'un circuit digital La présente description concerne un dispositif (1) comprenant : un oscillateur en anneau (3) comprenant une chaine de composants logiques (C1, C2, C3, C4, C5) ; un ensemble d'éléments de mémorisation (M1, M2, M2, M4, M5) chacun associé à un composant logique différent et configuré pour mémoriser un état d'une sortie (O1, O2, O3, O4 O5) dudit composant auquel ledit élément de mémorisation est associé ; un premier circuit (7) configuré pour compter des transitions d'états d'une sortie (O4 ; O1) d'un composant logique donné (C1 ; C4) de ladite chaîne ; un deuxième circuit (5) configuré pour synchroniser chaque mémorisation avec un signal d'horloge (clk) ; et un troisième circuit (9) configuré pour déterminer un nombre de composants logiques traversés par une transition d'états entre deux fronts du signal d'horloge, à partir du nombre compté de transitions d'états et des états mémorisés desdites sorties. Figure pour l'abrégé : Fig. 1
FR2002212A 2020-03-05 2020-03-05 Dispositif de surveillance d'un circuit digital Active FR3107983B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2002212A FR3107983B1 (fr) 2020-03-05 2020-03-05 Dispositif de surveillance d'un circuit digital
US17/189,984 US20210278461A1 (en) 2020-03-05 2021-03-02 Digital circuit monitoring device
CN202110239520.8A CN113359015A (zh) 2020-03-05 2021-03-04 数字电路监测设备

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2002212 2020-03-05
FR2002212A FR3107983B1 (fr) 2020-03-05 2020-03-05 Dispositif de surveillance d'un circuit digital

Publications (2)

Publication Number Publication Date
FR3107983A1 FR3107983A1 (fr) 2021-09-10
FR3107983B1 true FR3107983B1 (fr) 2022-05-27

Family

ID=70456995

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2002212A Active FR3107983B1 (fr) 2020-03-05 2020-03-05 Dispositif de surveillance d'un circuit digital

Country Status (3)

Country Link
US (1) US20210278461A1 (fr)
CN (1) CN113359015A (fr)
FR (1) FR3107983B1 (fr)

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6396896B1 (en) * 2000-04-28 2002-05-28 3G.Com Inc. Implementation of functions of multiple successive bits of a shift register
US6850123B1 (en) * 2003-05-27 2005-02-01 Xilinx, Inc. Circuits and methods for characterizing the speed performance of multi-input combinatorial logic
DE102005024648B4 (de) * 2005-05-25 2020-08-06 Infineon Technologies Ag Elektrische Schaltung zum Messen von Zeiten und Verfahren zum Messen von Zeiten
US7495519B2 (en) * 2007-04-30 2009-02-24 International Business Machines Corporation System and method for monitoring reliability of a digital system
US7548823B2 (en) * 2007-05-18 2009-06-16 International Business Machines Corporation Correction of delay-based metric measurements using delay circuits having differing metric sensitivities
JP2013088394A (ja) * 2011-10-21 2013-05-13 Renesas Electronics Corp 半導体装置
US9077322B2 (en) * 2012-08-20 2015-07-07 Tektronix, Inc. Ring oscillator timer circuit
US8786347B1 (en) * 2013-05-14 2014-07-22 Texas Instruments Incorporated Delay circuits for simulating delays based on a single cycle of a clock signal
US20150277393A1 (en) * 2014-04-01 2015-10-01 Qualcomm Incorporated Integrated circuit dynamic de-aging
US9652430B2 (en) * 2015-02-10 2017-05-16 Nxp Usa, Inc. Configurable serial and pulse width modulation interface
US9983262B1 (en) * 2016-06-30 2018-05-29 Amazon Technologies, Inc. Built-in self test controller for a random number generator core
US20180034452A1 (en) * 2016-07-26 2018-02-01 Qualcomm Incorporated Circuit technique to track cmos device threshold variation
EP3339985B1 (fr) * 2016-12-22 2019-05-08 ams AG Convertisseur temps-numérique et procédé de conversion
US20180350412A1 (en) * 2017-06-06 2018-12-06 Sandisk Technologies Llc Systems and methods for adaptive parallel-serial conversion operations
KR102413192B1 (ko) * 2017-11-03 2022-06-24 삼성전자주식회사 Nbti 또는 pbit를 모니터링하는 테스트 회로

Also Published As

Publication number Publication date
FR3107983A1 (fr) 2021-09-10
US20210278461A1 (en) 2021-09-09
CN113359015A (zh) 2021-09-07

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