FR3075407B1 - Circuit de commande pour la polarisation de transistors - Google Patents

Circuit de commande pour la polarisation de transistors Download PDF

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Publication number
FR3075407B1
FR3075407B1 FR1762532A FR1762532A FR3075407B1 FR 3075407 B1 FR3075407 B1 FR 3075407B1 FR 1762532 A FR1762532 A FR 1762532A FR 1762532 A FR1762532 A FR 1762532A FR 3075407 B1 FR3075407 B1 FR 3075407B1
Authority
FR
France
Prior art keywords
bias voltage
ctrl
generate
control signal
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1762532A
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English (en)
Other versions
FR3075407A1 (fr
Inventor
Anthony Quelen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1762532A priority Critical patent/FR3075407B1/fr
Priority to EP18212080.8A priority patent/EP3502827B1/fr
Priority to US16/224,653 priority patent/US10418977B2/en
Publication of FR3075407A1 publication Critical patent/FR3075407A1/fr
Application granted granted Critical
Publication of FR3075407B1 publication Critical patent/FR3075407B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0222—Charge pumping, substrate bias generation structures
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un circuit de polarisation de transistors, comprenant : un premier contrôleur (402) agencé pour recevoir un signal de capteur (F_SENSOR) généré sur la base des performances d'un ou plusieurs transistors d'un circuit numérique et pour comparer le signal de capteur à un signal de référence (F_REF) et pour générer un premier signal de commande de tension de polarisation (CTRL_N) ; un premier actionneur (404) agencé pour générer une première tension de polarisation (VNW, VPW) sur la base du premier signal de commande de tension de polarisation (CTRL_N) ; un deuxième actionneur (414) agencé pour générer une deuxième tension de polarisation (VPW, VNW) sur la base d'un deuxième signal de commande de tension de polarisation (CTRL_P) ; et un deuxième contrôleur (412) agencé pour générer le deuxième signal de commande de tension de polarisation (CTRL_P) sur la base d'un niveau de tension intermédiaire (VMID) généré sur la base des première et deuxième tensions de polarisation (VNW, VPW).
FR1762532A 2017-12-19 2017-12-19 Circuit de commande pour la polarisation de transistors Active FR3075407B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1762532A FR3075407B1 (fr) 2017-12-19 2017-12-19 Circuit de commande pour la polarisation de transistors
EP18212080.8A EP3502827B1 (fr) 2017-12-19 2018-12-12 Circuit de commande de polarisation de transistor
US16/224,653 US10418977B2 (en) 2017-12-19 2018-12-18 Control circuit for transistor biasing

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1762532 2017-12-19
FR1762532A FR3075407B1 (fr) 2017-12-19 2017-12-19 Circuit de commande pour la polarisation de transistors

Publications (2)

Publication Number Publication Date
FR3075407A1 FR3075407A1 (fr) 2019-06-21
FR3075407B1 true FR3075407B1 (fr) 2020-11-20

Family

ID=61802112

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1762532A Active FR3075407B1 (fr) 2017-12-19 2017-12-19 Circuit de commande pour la polarisation de transistors

Country Status (3)

Country Link
US (1) US10418977B2 (fr)
EP (1) EP3502827B1 (fr)
FR (1) FR3075407B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019225314A1 (fr) * 2018-05-22 2019-11-28 株式会社ソシオネクスト Dispositif à circuit intégré à semi-conducteur
CN117352509A (zh) * 2023-11-03 2024-01-05 广芯微电子（广州）股份有限公司 一种多电压区域衬底偏置结构

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4090231B2 (ja) * 2001-11-01 2008-05-28 株式会社ルネサステクノロジ 半導体集積回路装置
US7250807B1 (en) * 2003-06-05 2007-07-31 National Semiconductor Corporation Threshold scaling circuit that minimizes leakage current
US20060132218A1 (en) * 2004-12-20 2006-06-22 Tschanz James W Body biasing methods and circuits
JP4978950B2 (ja) * 2006-04-10 2012-07-18 ルネサスエレクトロニクス株式会社 半導体集積回路装置及び基板バイアス制御方法
US8816754B1 (en) * 2012-11-02 2014-08-26 Suvolta, Inc. Body bias circuits and methods
US9785177B1 (en) * 2016-08-03 2017-10-10 Nxp Usa, Inc. Symmetrical positive and negative reference voltage generation

Also Published As

Publication number Publication date
EP3502827B1 (fr) 2023-07-19
EP3502827A1 (fr) 2019-06-26
US10418977B2 (en) 2019-09-17
US20190190500A1 (en) 2019-06-20
FR3075407A1 (fr) 2019-06-21

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