FR2929447B1 - Procede de realisation d'une couche contrainte - Google Patents

Procede de realisation d'une couche contrainte

Info

Publication number
FR2929447B1
FR2929447B1 FR0852034A FR0852034A FR2929447B1 FR 2929447 B1 FR2929447 B1 FR 2929447B1 FR 0852034 A FR0852034 A FR 0852034A FR 0852034 A FR0852034 A FR 0852034A FR 2929447 B1 FR2929447 B1 FR 2929447B1
Authority
FR
France
Prior art keywords
layer
substrate
assembling
stress
magnetic field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0852034A
Other languages
English (en)
French (fr)
Other versions
FR2929447A1 (fr
Inventor
Chrystel Deguet
Frank Fournel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0852034A priority Critical patent/FR2929447B1/fr
Priority to AT09155871T priority patent/ATE515795T1/de
Priority to EP09155871A priority patent/EP2105958B1/fr
Priority to US12/410,161 priority patent/US7863156B2/en
Priority to JP2009080291A priority patent/JP5731104B2/ja
Publication of FR2929447A1 publication Critical patent/FR2929447A1/fr
Application granted granted Critical
Publication of FR2929447B1 publication Critical patent/FR2929447B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Micromachines (AREA)
  • Laminated Bodies (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Heating, Cooling, Or Curing Plastics Or The Like In General (AREA)
FR0852034A 2008-03-28 2008-03-28 Procede de realisation d'une couche contrainte Expired - Fee Related FR2929447B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0852034A FR2929447B1 (fr) 2008-03-28 2008-03-28 Procede de realisation d'une couche contrainte
AT09155871T ATE515795T1 (de) 2008-03-28 2009-03-23 Verfahren zur herstellung einer vorgespannten schicht
EP09155871A EP2105958B1 (fr) 2008-03-28 2009-03-23 Procédé de réalisation d'une couche contrainte
US12/410,161 US7863156B2 (en) 2008-03-28 2009-03-24 Method of producing a strained layer
JP2009080291A JP5731104B2 (ja) 2008-03-28 2009-03-27 ひずみ層の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0852034A FR2929447B1 (fr) 2008-03-28 2008-03-28 Procede de realisation d'une couche contrainte

Publications (2)

Publication Number Publication Date
FR2929447A1 FR2929447A1 (fr) 2009-10-02
FR2929447B1 true FR2929447B1 (fr) 2010-05-28

Family

ID=39944250

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0852034A Expired - Fee Related FR2929447B1 (fr) 2008-03-28 2008-03-28 Procede de realisation d'une couche contrainte

Country Status (5)

Country Link
US (1) US7863156B2 (enExample)
EP (1) EP2105958B1 (enExample)
JP (1) JP5731104B2 (enExample)
AT (1) ATE515795T1 (enExample)
FR (1) FR2929447B1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3040108B1 (fr) 2015-08-12 2017-08-11 Commissariat Energie Atomique Procede de fabrication d'une structure semi-conductrice avec collage direct temporaire exploitant une couche poreuse
DE102015216997A1 (de) * 2015-09-04 2017-03-09 Robert Bosch Gmbh Kapazitive Struktur und Verfahren zum Bestimmen einer Ladungsmenge unter Verwendung der kapazitiven Struktur
US12453287B2 (en) 2019-06-03 2025-10-21 Gregory Scott Fischer Optical actuator
FR3108788B1 (fr) * 2020-03-24 2026-01-23 Soitec Silicon On Insulator Procédé de fabrication d’une structure piézoélectrique pour dispositif radiofréquence et pouvant servir pour le transfert d’une couche piézoélectrique, et procédé de transfert d’une telle couche piézoélectrique

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0818115A (ja) * 1994-07-04 1996-01-19 Matsushita Electric Ind Co Ltd 複合圧電デバイス
US5834882A (en) * 1996-12-11 1998-11-10 Face International Corp. Multi-layer piezoelectric transformer
JP2000277715A (ja) * 1999-03-25 2000-10-06 Matsushita Electric Ind Co Ltd 半導体基板，その製造方法及び半導体装置
US6603156B2 (en) * 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US6614144B2 (en) * 2001-10-04 2003-09-02 Force International, Corp. Multilayer piezoelectric transformer
US6767749B2 (en) * 2002-04-22 2004-07-27 The United States Of America As Represented By The Secretary Of The Navy Method for making piezoelectric resonator and surface acoustic wave device using hydrogen implant layer splitting
US7176528B2 (en) * 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures
US6992025B2 (en) * 2004-01-12 2006-01-31 Sharp Laboratories Of America, Inc. Strained silicon on insulator from film transfer and relaxation by hydrogen implantation
WO2006097522A1 (en) * 2005-03-18 2006-09-21 Bae Systems Plc An actuator
JP4630733B2 (ja) * 2005-05-31 2011-02-09 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
US20090246933A1 (en) 2009-10-01
JP2009246366A (ja) 2009-10-22
JP5731104B2 (ja) 2015-06-10
EP2105958A1 (fr) 2009-09-30
EP2105958B1 (fr) 2011-07-06
FR2929447A1 (fr) 2009-10-02
US7863156B2 (en) 2011-01-04
ATE515795T1 (de) 2011-07-15

Similar Documents

Publication Publication Date Title
WO2005079198A3 (en) Wafer bonded virtual substrate and method for forming the same
TWI383032B (zh) 用於層疊半導體晶片的黏著薄膜
JP2022515871A5 (enExample)
WO2009113831A3 (ko) 반도체 패키징용 복합기능 테이프 및 이를 이용한 반도체 소자의 제조방법
EP1978553A3 (en) SOI substrate, method for manufacturing the same, and semiconductor device
CN103177935B (zh) 通过层转移制备柔性结构的方法及中间结构和柔性结构
JP2009516863A (ja) 複数の薄膜部品を含むスクリーン形の可撓性電子デバイスを製造する方法
US20090202857A1 (en) Method for forming an electronic device on a flexible metallic substrate and resultant device
WO2010090798A3 (en) Substrate bonding with metal germanium silicon material
WO2011044115A3 (en) Method for thin film thermoelectric module fabrication
TW200943477A (en) Method for manufacturing SOI substrate
EP3151268A3 (en) Method of producing a semiconductor device by bonding silver oxide on a surface of a semiconductor element with silver or silver oxide on a surface of a base
TW201332768A (zh) 電子裝置之製造方法
WO2008098404A3 (en) Method for manufacturing a single-crystal film, and integrated optical device comprising such a single-crystal film
WO2009107171A1 (ja) 薄膜積層デバイスの製造方法及び表示装置の製造方法、並びに、薄膜積層デバイス
KR101942967B1 (ko) 실록산계 단량체를 이용한 접합 기판 구조체 및 그 제조방법
ATE515795T1 (de) Verfahren zur herstellung einer vorgespannten schicht
Hsu et al. Effects of mechanical strain on TFTs on spherical domes
KR20180135999A (ko) 반도체 장치의 제조방법 및 반도체 장치
WO2008139684A1 (ja) Ｓｏｉ基板の製造方法及びｓｏｉ基板
EP2096686A3 (en) Semiconductor device
CN113574666A (zh) 具有支石墓结构的半导体装置的制造方法、支撑片的制造方法及层叠膜
JP2015129830A5 (enExample)
TW200640283A (en) Method of manufacturing an organic electronic device
EP2009694A3 (en) Semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20131129