FR2905799B1 - Realisation d'un substrat en gan - Google Patents
Realisation d'un substrat en ganInfo
- Publication number
- FR2905799B1 FR2905799B1 FR0607950A FR0607950A FR2905799B1 FR 2905799 B1 FR2905799 B1 FR 2905799B1 FR 0607950 A FR0607950 A FR 0607950A FR 0607950 A FR0607950 A FR 0607950A FR 2905799 B1 FR2905799 B1 FR 2905799B1
- Authority
- FR
- France
- Prior art keywords
- implementing
- gan substrate
- gan
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02389—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02634—Homoepitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0607950A FR2905799B1 (fr) | 2006-09-12 | 2006-09-12 | Realisation d'un substrat en gan |
PCT/EP2007/059500 WO2008031809A1 (fr) | 2006-09-12 | 2007-09-11 | PROCÉDÉ DE FABRICATION D'UN SUBSTRAT DE GaN |
KR1020097007430A KR101236213B1 (ko) | 2006-09-12 | 2007-09-11 | 질화갈륨 기판을 형성하기 위한 프로세스 |
EP07820110A EP2070111A1 (fr) | 2006-09-12 | 2007-09-11 | PROCÉDÉ DE FABRICATION D'UN SUBSTRAT DE GaN |
JP2009527158A JP2010502555A (ja) | 2006-09-12 | 2007-09-11 | GaN基板の製造方法 |
US12/310,345 US8263984B2 (en) | 2006-09-12 | 2007-11-11 | Process for making a GaN substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0607950A FR2905799B1 (fr) | 2006-09-12 | 2006-09-12 | Realisation d'un substrat en gan |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2905799A1 FR2905799A1 (fr) | 2008-03-14 |
FR2905799B1 true FR2905799B1 (fr) | 2008-12-26 |
Family
ID=37946233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0607950A Active FR2905799B1 (fr) | 2006-09-12 | 2006-09-12 | Realisation d'un substrat en gan |
Country Status (6)
Country | Link |
---|---|
US (1) | US8263984B2 (fr) |
EP (1) | EP2070111A1 (fr) |
JP (1) | JP2010502555A (fr) |
KR (1) | KR101236213B1 (fr) |
FR (1) | FR2905799B1 (fr) |
WO (1) | WO2008031809A1 (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103180494A (zh) * | 2011-10-07 | 2013-06-26 | 住友电气工业株式会社 | GaN基膜的制造方法及为此使用的复合衬底 |
JP6019928B2 (ja) * | 2011-10-07 | 2016-11-02 | 住友電気工業株式会社 | GaN系膜の製造方法およびそれに用いられる複合基板 |
KR20150138479A (ko) | 2014-05-29 | 2015-12-10 | 삼성전자주식회사 | 발광 소자 패키지의 제조 방법 |
WO2021046233A1 (fr) | 2019-09-03 | 2021-03-11 | Cancer Targeted Technology Llc | Inhibiteurs de psma contenant un chélate |
US11652146B2 (en) | 2020-02-07 | 2023-05-16 | Rfhic Corporation | Method of forming a semiconductor wafer containing a gallium-nitride layer and two diamond layers |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3904449A (en) * | 1974-05-09 | 1975-09-09 | Bell Telephone Labor Inc | Growth technique for high efficiency gallium arsenide impatt diodes |
JPS60150450A (ja) * | 1984-01-18 | 1985-08-08 | Honda Motor Co Ltd | 内燃エンジンのアイドル回転数フイ−ドバツク制御方法 |
CN100344004C (zh) * | 1997-10-30 | 2007-10-17 | 住友电气工业株式会社 | GaN单晶衬底及其制造方法 |
US6911707B2 (en) * | 1998-12-09 | 2005-06-28 | Advanced Micro Devices, Inc. | Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance |
JP3615081B2 (ja) * | 1999-03-30 | 2005-01-26 | 古河電気工業株式会社 | GaN単結晶の作製方法 |
JP3968968B2 (ja) | 2000-07-10 | 2007-08-29 | 住友電気工業株式会社 | 単結晶GaN基板の製造方法 |
FR2835096B1 (fr) * | 2002-01-22 | 2005-02-18 | Procede de fabrication d'un substrat auto-porte en materiau semi-conducteur monocristallin | |
US6649494B2 (en) * | 2001-01-29 | 2003-11-18 | Matsushita Electric Industrial Co., Ltd. | Manufacturing method of compound semiconductor wafer |
FR2843626B1 (fr) | 2002-08-14 | 2005-03-11 | Cryospace L Air Liquide Aerosp | Dispositif de support susceptible de proteger au moins un equipement de forme lineaire contre des sollicitations aerothermiques |
FR2843826B1 (fr) * | 2002-08-26 | 2006-12-22 | Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince | |
JPWO2005022610A1 (ja) * | 2003-09-01 | 2007-11-01 | 株式会社Sumco | 貼り合わせウェーハの製造方法 |
JP2005209803A (ja) * | 2004-01-21 | 2005-08-04 | Sumitomo Electric Ind Ltd | GaN結晶基板の製造方法 |
FR2877491B1 (fr) * | 2004-10-29 | 2007-01-19 | Soitec Silicon On Insulator | Structure composite a forte dissipation thermique |
WO2006082467A1 (fr) * | 2005-02-01 | 2006-08-10 | S.O.I.Tec Silicon On Insulator Technologies | Substrat destine a la cristallogenese d'un semi-conducteur de nitrure |
-
2006
- 2006-09-12 FR FR0607950A patent/FR2905799B1/fr active Active
-
2007
- 2007-09-11 EP EP07820110A patent/EP2070111A1/fr not_active Withdrawn
- 2007-09-11 JP JP2009527158A patent/JP2010502555A/ja active Pending
- 2007-09-11 WO PCT/EP2007/059500 patent/WO2008031809A1/fr active Application Filing
- 2007-09-11 KR KR1020097007430A patent/KR101236213B1/ko active IP Right Grant
- 2007-11-11 US US12/310,345 patent/US8263984B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR101236213B1 (ko) | 2013-02-22 |
US20100012947A1 (en) | 2010-01-21 |
FR2905799A1 (fr) | 2008-03-14 |
KR20090060343A (ko) | 2009-06-11 |
US8263984B2 (en) | 2012-09-11 |
WO2008031809A1 (fr) | 2008-03-20 |
EP2070111A1 (fr) | 2009-06-17 |
JP2010502555A (ja) | 2010-01-28 |
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Legal Events
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CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120423 |
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