FR2843826B1 - Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince - Google Patents

Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince

Info

Publication number
FR2843826B1
FR2843826B1 FR0210587A FR0210587A FR2843826B1 FR 2843826 B1 FR2843826 B1 FR 2843826B1 FR 0210587 A FR0210587 A FR 0210587A FR 0210587 A FR0210587 A FR 0210587A FR 2843826 B1 FR2843826 B1 FR 2843826B1
Authority
FR
France
Prior art keywords
buffer structure
taking
donor wafer
useful layer
recycling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0210587A
Other languages
English (en)
Other versions
FR2843826A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to FR0210587A priority Critical patent/FR2843826B1/fr
Priority to TW092123247A priority patent/TWI295833B/zh
Priority to PCT/IB2003/004143 priority patent/WO2004019404A2/fr
Priority to AT03792600T priority patent/ATE519222T1/de
Priority to KR1020057003367A priority patent/KR100931421B1/ko
Priority to JP2005501225A priority patent/JP4846363B2/ja
Priority to EP03792600A priority patent/EP1532677B1/fr
Priority to CNB038227851A priority patent/CN100547760C/zh
Priority to US10/764,289 priority patent/US7008857B2/en
Publication of FR2843826A1 publication Critical patent/FR2843826A1/fr
Priority to US11/285,008 priority patent/US7378729B2/en
Application granted granted Critical
Publication of FR2843826B1 publication Critical patent/FR2843826B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Laminated Bodies (AREA)
FR0210587A 2002-08-26 2002-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince Expired - Lifetime FR2843826B1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
FR0210587A FR2843826B1 (fr) 2002-08-26 2002-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince
TW092123247A TWI295833B (en) 2002-08-26 2003-08-25 Recycling a wafer comprising a buffer layer, after having taken off a thin layer therefrom
AT03792600T ATE519222T1 (de) 2002-08-26 2003-08-26 Wiederverwertung einer halbleiterscheibe, die eine pufferschicht enthält, nach der entfernung einer dünnen schicht daher
KR1020057003367A KR100931421B1 (ko) 2002-08-26 2003-08-26 버퍼층을 포함하는 웨이퍼를 그것으로부터 박막층을 분리한 후에 재활용하는 방법
JP2005501225A JP4846363B2 (ja) 2002-08-26 2003-08-26 薄層除去後のバッファ層を有するウエハの再利用
EP03792600A EP1532677B1 (fr) 2002-08-26 2003-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres retrait d'une couche mince
PCT/IB2003/004143 WO2004019404A2 (fr) 2002-08-26 2003-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres retrait d'une couche mince
CNB038227851A CN100547760C (zh) 2002-08-26 2003-08-26 在已经移去薄层之后对包括缓冲层的晶片的再循环方法
US10/764,289 US7008857B2 (en) 2002-08-26 2004-01-23 Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
US11/285,008 US7378729B2 (en) 2002-08-26 2005-11-23 Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0210587A FR2843826B1 (fr) 2002-08-26 2002-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince

Publications (2)

Publication Number Publication Date
FR2843826A1 FR2843826A1 (fr) 2004-02-27
FR2843826B1 true FR2843826B1 (fr) 2006-12-22

Family

ID=31198315

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0210587A Expired - Lifetime FR2843826B1 (fr) 2002-08-26 2002-08-26 Recyclage d'une plaquette comprenant une couche tampon, apres y avoir preleve une couche mince

Country Status (4)

Country Link
JP (1) JP4846363B2 (fr)
AT (1) ATE519222T1 (fr)
FR (1) FR2843826B1 (fr)
TW (1) TWI295833B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2905799B1 (fr) * 2006-09-12 2008-12-26 Soitec Silicon On Insulator Realisation d'un substrat en gan
US8946054B2 (en) 2013-04-19 2015-02-03 International Business Machines Corporation Crack control for substrate separation
US10373818B1 (en) * 2018-01-31 2019-08-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method of wafer recycling

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6306729B1 (en) * 1997-12-26 2001-10-23 Canon Kabushiki Kaisha Semiconductor article and method of manufacturing the same
JP2000349264A (ja) * 1998-12-04 2000-12-15 Canon Inc 半導体ウエハの製造方法、使用方法および利用方法
US6468923B1 (en) * 1999-03-26 2002-10-22 Canon Kabushiki Kaisha Method of producing semiconductor member
JP3453544B2 (ja) * 1999-03-26 2003-10-06 キヤノン株式会社 半導体部材の作製方法
US6326279B1 (en) * 1999-03-26 2001-12-04 Canon Kabushiki Kaisha Process for producing semiconductor article
US6375738B1 (en) * 1999-03-26 2002-04-23 Canon Kabushiki Kaisha Process of producing semiconductor article
WO2001011930A2 (fr) * 1999-08-10 2001-02-15 Silicon Genesis Corporation Procede de clivage permettant de fabriquer des substrats multicouche a l'aide de faibles doses d'implantation
JP3607194B2 (ja) * 1999-11-26 2005-01-05 株式会社東芝 半導体装置、半導体装置の製造方法、及び半導体基板
US6573126B2 (en) * 2000-08-16 2003-06-03 Massachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
JP4296726B2 (ja) * 2001-06-29 2009-07-15 株式会社Ｓｕｍｃｏ 半導体基板の製造方法及び電界効果型トランジスタの製造方法

Also Published As

Publication number Publication date
TW200414417A (en) 2004-08-01
JP2005537686A (ja) 2005-12-08
FR2843826A1 (fr) 2004-02-27
ATE519222T1 (de) 2011-08-15
JP4846363B2 (ja) 2011-12-28
TWI295833B (en) 2008-04-11

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