FR2890238B1 - Structures d'interconnexion en cuivre et procede de fabrication de celles-ci - Google Patents

Structures d'interconnexion en cuivre et procede de fabrication de celles-ci

Info

Publication number
FR2890238B1
FR2890238B1 FR0607252A FR0607252A FR2890238B1 FR 2890238 B1 FR2890238 B1 FR 2890238B1 FR 0607252 A FR0607252 A FR 0607252A FR 0607252 A FR0607252 A FR 0607252A FR 2890238 B1 FR2890238 B1 FR 2890238B1
Authority
FR
France
Prior art keywords
copper
manufacturing
same
interconnection structures
copper interconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0607252A
Other languages
English (en)
Other versions
FR2890238A1 (fr
Inventor
Chien-Hsueh Shih
Ming Hsing Tsai
Hung Wen Su
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Original Assignee
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of FR2890238A1 publication Critical patent/FR2890238A1/fr
Application granted granted Critical
Publication of FR2890238B1 publication Critical patent/FR2890238B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material

Abstract

Des structures d'interconnexion en cuivre sont destinées à des interconnexions. La structure d'interconnexion présente un évidement en cuivre prévu dans une structure à damasquinage, du cuivre remplissant un trou d'interconnexion/une tranchée d'une couche de diélectrique. En outre, la structure d'interconnexion peut également présenter un évidement en cuivre rempli avec un couvercle en métal.
FR0607252A 2005-08-23 2006-08-10 Structures d'interconnexion en cuivre et procede de fabrication de celles-ci Active FR2890238B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/209,891 US20070048991A1 (en) 2005-08-23 2005-08-23 Copper interconnect structures and fabrication method thereof

Publications (2)

Publication Number Publication Date
FR2890238A1 FR2890238A1 (fr) 2007-03-02
FR2890238B1 true FR2890238B1 (fr) 2017-02-24

Family

ID=37735055

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0607252A Active FR2890238B1 (fr) 2005-08-23 2006-08-10 Structures d'interconnexion en cuivre et procede de fabrication de celles-ci

Country Status (5)

Country Link
US (1) US20070048991A1 (fr)
JP (2) JP2007059901A (fr)
CN (1) CN1921102A (fr)
FR (1) FR2890238B1 (fr)
TW (1) TWI368294B (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070048991A1 (en) * 2005-08-23 2007-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Copper interconnect structures and fabrication method thereof
US7777344B2 (en) * 2007-04-11 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Transitional interface between metal and dielectric in interconnect structures
US20090269507A1 (en) 2008-04-29 2009-10-29 Sang-Ho Yu Selective cobalt deposition on copper surfaces
JP5507909B2 (ja) * 2009-07-14 2014-05-28 東京エレクトロン株式会社 成膜方法
US8298948B2 (en) * 2009-11-06 2012-10-30 International Business Machines Corporation Capping of copper interconnect lines in integrated circuit devices
CN114093809A (zh) * 2011-11-04 2022-02-25 英特尔公司 形成自对准帽的方法和设备
WO2013066356A1 (fr) 2011-11-04 2013-05-10 Intel Corporation Procédés et appareils pour former des couvercles auto-alignés
CN103390607B (zh) * 2012-05-09 2015-12-16 中芯国际集成电路制造(上海)有限公司 铜互连结构及其形成方法
CN102881647B (zh) * 2012-10-12 2015-09-30 上海华力微电子有限公司 铜金属覆盖层的制备方法
CN103972156B (zh) * 2013-02-06 2016-09-14 中芯国际集成电路制造(上海)有限公司 半导体互连结构及其制作方法
US8951909B2 (en) * 2013-03-13 2015-02-10 Taiwan Semiconductor Manufacturing Company Limited Integrated circuit structure and formation
US9583359B2 (en) 2014-04-04 2017-02-28 Fujifilm Planar Solutions, LLC Polishing compositions and methods for selectively polishing silicon nitride over silicon oxide films
US20150380296A1 (en) * 2014-06-25 2015-12-31 Lam Research Corporation Cleaning of carbon-based contaminants in metal interconnects for interconnect capping applications
DE102018102685A1 (de) * 2017-11-30 2019-06-06 Taiwan Semiconductor Manufacturing Co., Ltd. Kontaktbildungsverfahren und zugehörige Struktur

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920010774A (ko) * 1990-11-16 1992-06-27 아이자와 스스무 반도체장치의 제조방법
JPH08264538A (ja) * 1995-03-28 1996-10-11 Sumitomo Metal Ind Ltd 配線の形成方法
JP3540699B2 (ja) * 1998-01-12 2004-07-07 松下電器産業株式会社 半導体装置の製造方法
US6232212B1 (en) * 1999-02-23 2001-05-15 Lucent Technologies Flip chip bump bonding
US6046108A (en) * 1999-06-25 2000-04-04 Taiwan Semiconductor Manufacturing Company Method for selective growth of Cu3 Ge or Cu5 Si for passivation of damascene copper structures and device manufactured thereby
US6734559B1 (en) * 1999-09-17 2004-05-11 Advanced Micro Devices, Inc. Self-aligned semiconductor interconnect barrier and manufacturing method therefor
US6620720B1 (en) * 2000-04-10 2003-09-16 Agere Systems Inc Interconnections to copper IC's
JP2002110676A (ja) * 2000-09-26 2002-04-12 Toshiba Corp 多層配線を有する半導体装置
US6977224B2 (en) * 2000-12-28 2005-12-20 Intel Corporation Method of electroless introduction of interconnect structures
WO2003017359A1 (fr) * 2001-08-13 2003-02-27 Ebara Corporation Dispositif a semiconducteur, son procede de production et solution de galvanoplastie
JP2003124189A (ja) * 2001-10-10 2003-04-25 Fujitsu Ltd 半導体装置の製造方法
JP2004015028A (ja) * 2002-06-11 2004-01-15 Ebara Corp 基板処理方法及び半導体装置
JP2004095865A (ja) * 2002-08-30 2004-03-25 Nec Electronics Corp 半導体装置およびその製造方法
KR100542388B1 (ko) * 2003-07-18 2006-01-11 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성방법
JP2005044910A (ja) * 2003-07-24 2005-02-17 Ebara Corp 配線形成方法及び配線形成装置
JP2005217371A (ja) * 2004-02-02 2005-08-11 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US20070048991A1 (en) * 2005-08-23 2007-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Copper interconnect structures and fabrication method thereof
KR20070071020A (ko) * 2005-12-29 2007-07-04 동부일렉트로닉스 주식회사 캐핑 금속층에 의해 보호된 구리 금속 배선 및 그 제조방법

Also Published As

Publication number Publication date
TWI368294B (en) 2012-07-11
TW200723448A (en) 2007-06-16
JP2009278132A (ja) 2009-11-26
US20070048991A1 (en) 2007-03-01
JP5528027B2 (ja) 2014-06-25
JP2007059901A (ja) 2007-03-08
FR2890238A1 (fr) 2007-03-02
CN1921102A (zh) 2007-02-28

Similar Documents

Publication Publication Date Title
FR2890238B1 (fr) Structures d'interconnexion en cuivre et procede de fabrication de celles-ci
WO2008069832A3 (fr) Structure et procédé permettant de créer des contacts de traversées fiables pour des applications d'interconnexion
TW200731537A (en) Semiconductor device and manufacturing method thereof
GB2425888A (en) In-situ surface treatment for memory cell formation
SG135091A1 (en) Entire encapsulation of cu interconnects using self-aligned cusin film
TW200644159A (en) Interconnect structures, dual damascene structures and methods for fabricating the same
TW200618186A (en) Forming integrated circuits with replacement metal gate electrodes
GB2465127A (en) MOS structures that exhibit lower contact resistance and methods for fabricating the same
TW200709344A (en) Preamorphization to minimize void formation
EP1961036A4 (fr) Liaison hermétique au niveau plaquette faisant intervenir un alliage métallique et une zone élevée
SG104365A1 (en) Copper recess formation using chemical process for fabricating barrier cap for lines and vias
WO2007051718A3 (fr) Structure et procede de regulation de la degradation induite par des contraintes d'interconnexions conductrices
TW200707754A (en) Wire structure, method of forming wire, thin film transistor substrate, and method of manufacturing thin film transistor substrate
SG149010A1 (en) Grain boundary blocking for stress migration and electromigration improvement in cu interconnects
TW200723542A (en) Flat panel display and method of fabricating the same
EP1401016A3 (fr) Double damasquinage avec traversées auto-alignées, au moyen d'un masque enterré
WO2009060556A1 (fr) Structure de câblage et procédé pour former cette structure
TW200607003A (en) Metal interconnect features with a doping gradient and method for fabricating the same
FR2874497A1 (fr) Implant comprenant une ou plusieurs electrodes et instrument de pose associe
EP2337067A3 (fr) Realisation de structures d'interconnexions TSV formées d'un contour isolant et d'une zône conductrice située dans le contour et disjointe du contour
TWI339874B (en) Formation of low resistance via contacts in interconnect structures
TW200627512A (en) Structure with via hole and trench and the fabrication method thereof
WO2009155160A3 (fr) Structure de métallisation épaisse multicouche pour dispositif micro-électronique, circuit intégré contenant cette structure et procédé de fabrication d'un tel circuit
TW200711090A (en) Ground shield and related method
FR2913816B1 (fr) Procede de fabrication d'une structure d'interconnexions a cavites pour circuit integre

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 10

PLFP Fee payment

Year of fee payment: 11

PLFP Fee payment

Year of fee payment: 12

PLFP Fee payment

Year of fee payment: 13

PLFP Fee payment

Year of fee payment: 14

PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 16

PLFP Fee payment

Year of fee payment: 17

PLFP Fee payment

Year of fee payment: 18