FR2857503B1 - Procede d'implantation au travers d'une surface irreguliere - Google Patents
Procede d'implantation au travers d'une surface irreguliereInfo
- Publication number
- FR2857503B1 FR2857503B1 FR0308462A FR0308462A FR2857503B1 FR 2857503 B1 FR2857503 B1 FR 2857503B1 FR 0308462 A FR0308462 A FR 0308462A FR 0308462 A FR0308462 A FR 0308462A FR 2857503 B1 FR2857503 B1 FR 2857503B1
- Authority
- FR
- France
- Prior art keywords
- implantation
- atomic species
- uneven surface
- irregular surface
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Priority Applications (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0308462A FR2857503B1 (fr) | 2003-07-10 | 2003-07-10 | Procede d'implantation au travers d'une surface irreguliere |
US10/840,599 US7018913B2 (en) | 2003-07-10 | 2004-05-05 | Method for implanting atomic species through an uneven surface of a semiconductor layer |
CNB2004800197230A CN100419961C (zh) | 2003-07-10 | 2004-07-12 | 用于通过不规则表面注入的方法 |
PCT/FR2004/001826 WO2005008756A1 (fr) | 2003-07-10 | 2004-07-12 | Procede d’implantation au travers d’une surface irreguliere |
AT04767657T ATE467904T1 (de) | 2003-07-10 | 2004-07-12 | Verfahren zur implantation durch eine irreguläre oberfläche |
EP04767657A EP1644969B1 (fr) | 2003-07-10 | 2004-07-12 | Procede d'implantation au travers d'une surface irreguliere |
JP2006518307A JP4381416B2 (ja) | 2003-07-10 | 2004-07-12 | 不規則面を通しての注入方法 |
DE602004027138T DE602004027138D1 (de) | 2003-07-10 | 2004-07-12 | Verfahren zur implantation durch eine irreguläre oberfläche |
KR1020067000528A KR100751628B1 (ko) | 2003-07-10 | 2004-07-12 | 불규칙 표면을 통한 임플란트 방법 |
US11/261,785 US7265435B2 (en) | 2003-07-10 | 2005-10-31 | Method for implanting atomic species through an uneven surface of a semiconductor layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0308462A FR2857503B1 (fr) | 2003-07-10 | 2003-07-10 | Procede d'implantation au travers d'une surface irreguliere |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2857503A1 FR2857503A1 (fr) | 2005-01-14 |
FR2857503B1 true FR2857503B1 (fr) | 2005-11-11 |
Family
ID=33522937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0308462A Expired - Fee Related FR2857503B1 (fr) | 2003-07-10 | 2003-07-10 | Procede d'implantation au travers d'une surface irreguliere |
Country Status (9)
Country | Link |
---|---|
US (2) | US7018913B2 (fr) |
EP (1) | EP1644969B1 (fr) |
JP (1) | JP4381416B2 (fr) |
KR (1) | KR100751628B1 (fr) |
CN (1) | CN100419961C (fr) |
AT (1) | ATE467904T1 (fr) |
DE (1) | DE602004027138D1 (fr) |
FR (1) | FR2857503B1 (fr) |
WO (1) | WO2005008756A1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1858071A1 (fr) * | 2006-05-18 | 2007-11-21 | S.O.I.TEC. Silicon on Insulator Technologies S.A. | Procédé de fabrication d'une plaquette de type semi-conducteur sur isolant, et plaquette de type semi-conducteur sur isolant |
JP5452590B2 (ja) * | 2008-06-20 | 2014-03-26 | 天錫 李 | 薄膜製造方法 |
EP2718965A4 (fr) | 2011-06-09 | 2014-11-12 | Commissariat L Energie Atomique Et Aux Energies Alternatives | Procédé de fabrication d'un transistor à effet de champ comportant une implantation à travers les espaceurs |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04168764A (ja) * | 1990-11-01 | 1992-06-16 | Nec Yamagata Ltd | 半導体装置の製造方法 |
WO1996015550A1 (fr) * | 1994-11-10 | 1996-05-23 | Lawrence Semiconductor Research Laboratory, Inc. | Compositions silicium-germanium-carbone et processus associes |
KR100304161B1 (ko) * | 1996-12-18 | 2001-11-30 | 미다라이 후지오 | 반도체부재의제조방법 |
JP2967745B2 (ja) * | 1997-02-06 | 1999-10-25 | 日本電気株式会社 | 半導体装置の製造方法 |
US6326279B1 (en) * | 1999-03-26 | 2001-12-04 | Canon Kabushiki Kaisha | Process for producing semiconductor article |
FR2817395B1 (fr) * | 2000-11-27 | 2003-10-31 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede |
-
2003
- 2003-07-10 FR FR0308462A patent/FR2857503B1/fr not_active Expired - Fee Related
-
2004
- 2004-05-05 US US10/840,599 patent/US7018913B2/en active Active
- 2004-07-12 DE DE602004027138T patent/DE602004027138D1/de active Active
- 2004-07-12 WO PCT/FR2004/001826 patent/WO2005008756A1/fr active Search and Examination
- 2004-07-12 EP EP04767657A patent/EP1644969B1/fr not_active Not-in-force
- 2004-07-12 KR KR1020067000528A patent/KR100751628B1/ko active IP Right Grant
- 2004-07-12 JP JP2006518307A patent/JP4381416B2/ja active Active
- 2004-07-12 AT AT04767657T patent/ATE467904T1/de not_active IP Right Cessation
- 2004-07-12 CN CNB2004800197230A patent/CN100419961C/zh not_active Expired - Fee Related
-
2005
- 2005-10-31 US US11/261,785 patent/US7265435B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
ATE467904T1 (de) | 2010-05-15 |
KR100751628B1 (ko) | 2007-08-22 |
CN1820354A (zh) | 2006-08-16 |
EP1644969B1 (fr) | 2010-05-12 |
WO2005008756A1 (fr) | 2005-01-27 |
US20050009348A1 (en) | 2005-01-13 |
DE602004027138D1 (de) | 2010-06-24 |
US7265435B2 (en) | 2007-09-04 |
JP2007525823A (ja) | 2007-09-06 |
CN100419961C (zh) | 2008-09-17 |
EP1644969A1 (fr) | 2006-04-12 |
FR2857503A1 (fr) | 2005-01-14 |
KR20060029684A (ko) | 2006-04-06 |
JP4381416B2 (ja) | 2009-12-09 |
US20060051944A1 (en) | 2006-03-09 |
US7018913B2 (en) | 2006-03-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120423 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 15 |
|
PLFP | Fee payment |
Year of fee payment: 16 |
|
PLFP | Fee payment |
Year of fee payment: 18 |
|
ST | Notification of lapse |
Effective date: 20220305 |