FR2857503B1 - Procede d'implantation au travers d'une surface irreguliere - Google Patents

Procede d'implantation au travers d'une surface irreguliere

Info

Publication number
FR2857503B1
FR2857503B1 FR0308462A FR0308462A FR2857503B1 FR 2857503 B1 FR2857503 B1 FR 2857503B1 FR 0308462 A FR0308462 A FR 0308462A FR 0308462 A FR0308462 A FR 0308462A FR 2857503 B1 FR2857503 B1 FR 2857503B1
Authority
FR
France
Prior art keywords
implantation
atomic species
uneven surface
irregular surface
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0308462A
Other languages
English (en)
Other versions
FR2857503A1 (fr
Inventor
Bruno Ghyselen
Takeshi Akatsu
Richard Fontaniere
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR0308462A priority Critical patent/FR2857503B1/fr
Priority to US10/840,599 priority patent/US7018913B2/en
Priority to JP2006518307A priority patent/JP4381416B2/ja
Priority to CNB2004800197230A priority patent/CN100419961C/zh
Priority to PCT/FR2004/001826 priority patent/WO2005008756A1/fr
Priority to AT04767657T priority patent/ATE467904T1/de
Priority to EP04767657A priority patent/EP1644969B1/fr
Priority to DE602004027138T priority patent/DE602004027138D1/de
Priority to KR1020067000528A priority patent/KR100751628B1/ko
Publication of FR2857503A1 publication Critical patent/FR2857503A1/fr
Priority to US11/261,785 priority patent/US7265435B2/en
Application granted granted Critical
Publication of FR2857503B1 publication Critical patent/FR2857503B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
FR0308462A 2003-07-10 2003-07-10 Procede d'implantation au travers d'une surface irreguliere Expired - Fee Related FR2857503B1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
FR0308462A FR2857503B1 (fr) 2003-07-10 2003-07-10 Procede d'implantation au travers d'une surface irreguliere
US10/840,599 US7018913B2 (en) 2003-07-10 2004-05-05 Method for implanting atomic species through an uneven surface of a semiconductor layer
CNB2004800197230A CN100419961C (zh) 2003-07-10 2004-07-12 用于通过不规则表面注入的方法
PCT/FR2004/001826 WO2005008756A1 (fr) 2003-07-10 2004-07-12 Procede d’implantation au travers d’une surface irreguliere
AT04767657T ATE467904T1 (de) 2003-07-10 2004-07-12 Verfahren zur implantation durch eine irreguläre oberfläche
EP04767657A EP1644969B1 (fr) 2003-07-10 2004-07-12 Procede d'implantation au travers d'une surface irreguliere
JP2006518307A JP4381416B2 (ja) 2003-07-10 2004-07-12 不規則面を通しての注入方法
DE602004027138T DE602004027138D1 (de) 2003-07-10 2004-07-12 Verfahren zur implantation durch eine irreguläre oberfläche
KR1020067000528A KR100751628B1 (ko) 2003-07-10 2004-07-12 불규칙 표면을 통한 임플란트 방법
US11/261,785 US7265435B2 (en) 2003-07-10 2005-10-31 Method for implanting atomic species through an uneven surface of a semiconductor layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0308462A FR2857503B1 (fr) 2003-07-10 2003-07-10 Procede d'implantation au travers d'une surface irreguliere

Publications (2)

Publication Number Publication Date
FR2857503A1 FR2857503A1 (fr) 2005-01-14
FR2857503B1 true FR2857503B1 (fr) 2005-11-11

Family

ID=33522937

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0308462A Expired - Fee Related FR2857503B1 (fr) 2003-07-10 2003-07-10 Procede d'implantation au travers d'une surface irreguliere

Country Status (9)

Country Link
US (2) US7018913B2 (fr)
EP (1) EP1644969B1 (fr)
JP (1) JP4381416B2 (fr)
KR (1) KR100751628B1 (fr)
CN (1) CN100419961C (fr)
AT (1) ATE467904T1 (fr)
DE (1) DE602004027138D1 (fr)
FR (1) FR2857503B1 (fr)
WO (1) WO2005008756A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1858071A1 (fr) * 2006-05-18 2007-11-21 S.O.I.TEC. Silicon on Insulator Technologies S.A. Procédé de fabrication d'une plaquette de type semi-conducteur sur isolant, et plaquette de type semi-conducteur sur isolant
JP5452590B2 (ja) * 2008-06-20 2014-03-26 天錫 李 薄膜製造方法
EP2718965A4 (fr) 2011-06-09 2014-11-12 Commissariat L Energie Atomique Et Aux Energies Alternatives Procédé de fabrication d'un transistor à effet de champ comportant une implantation à travers les espaceurs

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04168764A (ja) * 1990-11-01 1992-06-16 Nec Yamagata Ltd 半導体装置の製造方法
WO1996015550A1 (fr) * 1994-11-10 1996-05-23 Lawrence Semiconductor Research Laboratory, Inc. Compositions silicium-germanium-carbone et processus associes
KR100304161B1 (ko) * 1996-12-18 2001-11-30 미다라이 후지오 반도체부재의제조방법
JP2967745B2 (ja) * 1997-02-06 1999-10-25 日本電気株式会社 半導体装置の製造方法
US6326279B1 (en) * 1999-03-26 2001-12-04 Canon Kabushiki Kaisha Process for producing semiconductor article
FR2817395B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede

Also Published As

Publication number Publication date
ATE467904T1 (de) 2010-05-15
KR100751628B1 (ko) 2007-08-22
CN1820354A (zh) 2006-08-16
EP1644969B1 (fr) 2010-05-12
WO2005008756A1 (fr) 2005-01-27
US20050009348A1 (en) 2005-01-13
DE602004027138D1 (de) 2010-06-24
US7265435B2 (en) 2007-09-04
JP2007525823A (ja) 2007-09-06
CN100419961C (zh) 2008-09-17
EP1644969A1 (fr) 2006-04-12
FR2857503A1 (fr) 2005-01-14
KR20060029684A (ko) 2006-04-06
JP4381416B2 (ja) 2009-12-09
US20060051944A1 (en) 2006-03-09
US7018913B2 (en) 2006-03-28

Similar Documents

Publication Publication Date Title
FR2847075A1 (fr) Procede de formation d'une zone fragile dans un substrat par co-implantation
FR2842349B1 (fr) Transfert d'une couche mince a partir d'une plaquette comprenant une couche tampon
EA200600902A1 (ru) Способ и устройство нанесения покрытия на имплантаты
TW348300B (en) Semiconductor device fabrication method and apparatus using connecting implants
EP1781350A4 (fr) Methode de fabrication d'un dispositif medical enrobe
EP1255302A3 (fr) Procédé de fabrication de dispositifs à blocage direct et inverse
FR2845523B1 (fr) Procede pour realiser un substrat par transfert d'une plaquette donneuse comportant des especes etrangeres, et plaquette donneuse associee
FR2845518B1 (fr) Realisation d'un substrat semiconducteur demontable et obtention d'un element semiconducteur
EP0948043A3 (fr) Méthode avec une controlabilité améliorée d'une couche enterrée
TW200507269A (en) Manufacturing method of semiconductor device
TW200601397A (en) Method for forming a chamber in an electronic device and device formed thereby
FR2857503B1 (fr) Procede d'implantation au travers d'une surface irreguliere
TW200516666A (en) Formulation of a silicon germanium-on-insulator structure by oxidation of a buried porous silicon layer
DE59912665D1 (de) Verfahren zur Herstellung von Leistungshalbleiterbauelementen
DE60131334D1 (de) Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahren
ATE418793T1 (de) Halbleiterbauelement und verfahren zur herstellung eines solchen bauelements
TW356579B (en) Planar trenches
TW200504848A (en) Electron beam processing method and apparatus
EP1058319A3 (fr) Procédé de stabilisation d'un dispositif semiconducteur SOI et dispositif semiconducteur SOI
TW200610629A (en) Ceramic blade and fabrication method thereof
ATE415703T1 (de) Herstellung von hohlräumen in einer siliziumscheibe
GEP20043309B (en) Method of Control of Dirt Diffusion Profile in Semiconductors
TW349248B (en) Multiple pocket implant for improved performance and channel length control of MOSFET properties
TW375755B (en) Process for emitter of field emission display
DE59804251D1 (de) Verfahren zur gezielten herstellung von n-leitenden bereichen in diamantschichten mittels ionenimplantation

Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20120423

PLFP Fee payment

Year of fee payment: 14

PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 16

PLFP Fee payment

Year of fee payment: 18

ST Notification of lapse

Effective date: 20220305