FR2833783B1 - Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associe - Google Patents
Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associeInfo
- Publication number
- FR2833783B1 FR2833783B1 FR0116072A FR0116072A FR2833783B1 FR 2833783 B1 FR2833783 B1 FR 2833783B1 FR 0116072 A FR0116072 A FR 0116072A FR 0116072 A FR0116072 A FR 0116072A FR 2833783 B1 FR2833783 B1 FR 2833783B1
- Authority
- FR
- France
- Prior art keywords
- pae
- component
- memory cell
- integrated circuit
- implementation method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
- G11C11/4125—Cells incorporating circuit means for protecting against loss of information
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0116072A FR2833783B1 (fr) | 2001-12-13 | 2001-12-13 | Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associe |
US10/318,955 US7109541B2 (en) | 2001-12-13 | 2002-12-13 | Integrated circuit component, protected against random logic events, and associated method of manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0116072A FR2833783B1 (fr) | 2001-12-13 | 2001-12-13 | Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associe |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2833783A1 FR2833783A1 (fr) | 2003-06-20 |
FR2833783B1 true FR2833783B1 (fr) | 2004-03-12 |
Family
ID=8870400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0116072A Expired - Fee Related FR2833783B1 (fr) | 2001-12-13 | 2001-12-13 | Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associe |
Country Status (2)
Country | Link |
---|---|
US (1) | US7109541B2 (fr) |
FR (1) | FR2833783B1 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100672673B1 (ko) * | 2004-12-29 | 2007-01-24 | 동부일렉트로닉스 주식회사 | 커패시터 구조 및 그 제조방법 |
US7397692B1 (en) * | 2006-12-19 | 2008-07-08 | International Business Machines Corporation | High performance single event upset hardened SRAM cell |
US20090001481A1 (en) * | 2007-06-26 | 2009-01-01 | Ethan Harrison Cannon | Digital circuits having additional capacitors for additional stability |
DE102008003385A1 (de) * | 2008-01-07 | 2009-07-09 | Qimonda Ag | Bistabile Kippstufenschaltung und Verfahren zur Kompensation einer Störung einer bistabilen Kippstufenschaltung |
KR101037501B1 (ko) * | 2008-10-30 | 2011-05-26 | 주식회사 하이닉스반도체 | 고집적 반도체 기억 장치 |
US10332570B1 (en) * | 2017-12-12 | 2019-06-25 | Advanced Micro Devices, Inc. | Capacitive lines and multi-voltage negative bitline write assist driver |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6011354A (ja) | 1983-07-01 | 1985-01-21 | 住友ベークライト株式会社 | 複合積層板 |
JPS61170057A (ja) * | 1985-01-24 | 1986-07-31 | Seiko Epson Corp | 縦型キヤパシタ− |
US5194749A (en) * | 1987-11-30 | 1993-03-16 | Hitachi, Ltd. | Semiconductor integrated circuit device |
JPH04149519A (ja) | 1990-10-15 | 1992-05-22 | Canon Inc | 光学変調素子および該素子を用いた表示装置 |
JP2983373B2 (ja) * | 1992-02-25 | 1999-11-29 | シャープ株式会社 | スタティック型メモリセル |
JP3250257B2 (ja) * | 1992-06-09 | 2002-01-28 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
KR100305123B1 (ko) * | 1992-12-11 | 2001-11-22 | 비센트 비.인그라시아, 알크 엠 아헨 | 정적랜덤액세스메모리셀및이를포함하는반도체장치 |
US6033919A (en) * | 1996-10-25 | 2000-03-07 | Texas Instruments Incorporated | Method of forming sidewall capacitance structure |
JP2000293989A (ja) * | 1999-04-07 | 2000-10-20 | Nec Corp | 強誘電体容量を用いたシャドーramセル及び不揮発性メモリ装置並びにその制御方法 |
IT1308465B1 (it) * | 1999-04-30 | 2001-12-17 | St Microelectronics Srl | Struttura di cella di memoriadi tipo impilato, in particolare cellaferroelettrica |
US6747307B1 (en) * | 2000-04-04 | 2004-06-08 | Koninklijke Philips Electronics N.V. | Combined transistor-capacitor structure in deep sub-micron CMOS for power amplifiers |
-
2001
- 2001-12-13 FR FR0116072A patent/FR2833783B1/fr not_active Expired - Fee Related
-
2002
- 2002-12-13 US US10/318,955 patent/US7109541B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20030117199A1 (en) | 2003-06-26 |
US7109541B2 (en) | 2006-09-19 |
FR2833783A1 (fr) | 2003-06-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69938767D1 (de) | Halbleiterbauelement und dessen herstellungsverfahren, bauelementsubstrat, und elektronisches bauelement | |
GB2344222B (en) | Chip type electronic part and method for the manufacture thereof | |
HK1027658A1 (en) | Chip electronic component and manufacturing method thereof | |
WO2005050941A3 (fr) | Accumulation de donnees entre une trajectoire de donnees et un dispositif memoire | |
PT966007E (pt) | Condensador electrolitico solido tipo chip e seu metodo de fabrico | |
HK1065144A1 (en) | Ic chip and information processing terminal | |
AU2209200A (en) | Semiconductor chip interconnect barrier material and fabrication method | |
AU1687300A (en) | Semiconductor chip, semiconductor device, circuit board and electronic equipmentand production methods for them | |
GB0328893D0 (en) | Systems and methods for electronic trading that permit principal/broker trading | |
FR2788375B1 (fr) | Procede de protection de puce de circuit integre | |
GB0326274D0 (en) | Electronic asset assignment and tracking | |
FR2790887B1 (fr) | Circuit logique protege contre des perturbations transitoires | |
IL137973A0 (en) | Event-driven processing of data | |
DE69939684D1 (de) | Mit esd-schutz ausgestatteter integrierter schaltkreis | |
FR2833783B1 (fr) | Composant d'un circuit integre, pae exemple une cellule de memorisation, protege contre les aleas logiques, et procede de realisation associe | |
AU1278300A (en) | Contactless electronic module, chip card comprising same, and methods for makingsame | |
AU2003228800A1 (en) | System and method for electronic business transaction reliability | |
FR2781298B1 (fr) | Procede de fabrication d'une carte a puce electronique et carte a puce electronique | |
SG80077A1 (en) | Semiconductor integrated circuit card manufacturing method, and semiconductor integrated circuit card | |
GB2406418B (en) | Circuits and methods for providing variable data I/O width for semiconductor memory devices | |
AU2002334330A1 (en) | Electronic circuit comprising conductive bridges and method for making such bridges | |
DE60224285D1 (de) | Chipbearbeitungsverfahren und einrichtung durch v-cad-daten | |
FR2832852B1 (fr) | Procede de fabrication d'un composant electronique incorporant un micro-composant inductif | |
FR2718569B1 (fr) | Circuit de protection assurant la protection des circuits intégrés contre les décharges électrostatiques (ESD). | |
SG91825A1 (en) | Electronic component chip feeder and manufacturing method of electronic devices using electronic component chips |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20070831 |