FR2812753B1 - Point memoire non volatile - Google Patents

Point memoire non volatile

Info

Publication number
FR2812753B1
FR2812753B1 FR0010287A FR0010287A FR2812753B1 FR 2812753 B1 FR2812753 B1 FR 2812753B1 FR 0010287 A FR0010287 A FR 0010287A FR 0010287 A FR0010287 A FR 0010287A FR 2812753 B1 FR2812753 B1 FR 2812753B1
Authority
FR
France
Prior art keywords
volatile memory
memory point
point
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0010287A
Other languages
English (en)
Other versions
FR2812753A1 (fr
Inventor
Cyrille Dray
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0010287A priority Critical patent/FR2812753B1/fr
Priority to US09/921,280 priority patent/US6639270B2/en
Publication of FR2812753A1 publication Critical patent/FR2812753A1/fr
Application granted granted Critical
Publication of FR2812753B1 publication Critical patent/FR2812753B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324Gate electrodes for transistors with a floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
FR0010287A 2000-08-03 2000-08-03 Point memoire non volatile Expired - Fee Related FR2812753B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0010287A FR2812753B1 (fr) 2000-08-03 2000-08-03 Point memoire non volatile
US09/921,280 US6639270B2 (en) 2000-08-03 2001-08-02 Non-volatile memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0010287A FR2812753B1 (fr) 2000-08-03 2000-08-03 Point memoire non volatile

Publications (2)

Publication Number Publication Date
FR2812753A1 FR2812753A1 (fr) 2002-02-08
FR2812753B1 true FR2812753B1 (fr) 2003-01-03

Family

ID=8853289

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0010287A Expired - Fee Related FR2812753B1 (fr) 2000-08-03 2000-08-03 Point memoire non volatile

Country Status (2)

Country Link
US (1) US6639270B2 (fr)
FR (1) FR2812753B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7402874B2 (en) * 2005-04-29 2008-07-22 Texas Instruments Incorporated One time programmable EPROM fabrication in STI CMOS technology
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
EP2686882A4 (fr) * 2011-03-15 2014-11-12 Hewlett Packard Development Co Cellule de mémoire ayant une structure courbe close
US8324663B2 (en) 2011-04-01 2012-12-04 Texas Instruments Incorporated Area efficient high-speed dual one-time programmable differential bit cell
CN104600073B (zh) * 2013-10-30 2017-06-06 上海华虹宏力半导体制造有限公司 Otp器件及制造方法
US9356105B1 (en) * 2014-12-29 2016-05-31 Macronix International Co., Ltd. Ring gate transistor design for flash memory
US9953727B1 (en) 2017-02-10 2018-04-24 Globalfoundries Inc. Circuit and method for detecting time dependent dielectric breakdown (TDDB) shorts and signal-margin testing

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH061840B2 (ja) * 1987-07-08 1994-01-05 日本電気株式会社 光遮へい型uprom
DE69204829T2 (de) * 1992-06-30 1996-02-22 Sgs Thomson Microelectronics Integrierte Schaltung mit vollständigem Schutz gegen Ultraviolettstrahlen.
JPH06204468A (ja) * 1992-12-28 1994-07-22 Nippon Steel Corp 電界効果トランジスタ
KR0125113B1 (ko) * 1993-02-02 1997-12-11 모리시타 요이찌 불휘발성 반도체 메모리 집적장치 및 그 제조방법
US6433382B1 (en) * 1995-04-06 2002-08-13 Motorola, Inc. Split-gate vertically oriented EEPROM device and process
JP2001189439A (ja) * 2000-01-05 2001-07-10 Mitsubishi Electric Corp 不揮発性半導体記憶装置の製造方法及び不揮発性半導体記憶装置

Also Published As

Publication number Publication date
FR2812753A1 (fr) 2002-02-08
US20020050610A1 (en) 2002-05-02
US6639270B2 (en) 2003-10-28

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090430