FR2621172B1 - Procede de fabrication de dispositifs a semiconducteur ayant un contact ohmique - Google Patents
Procede de fabrication de dispositifs a semiconducteur ayant un contact ohmiqueInfo
- Publication number
- FR2621172B1 FR2621172B1 FR888812582A FR8812582A FR2621172B1 FR 2621172 B1 FR2621172 B1 FR 2621172B1 FR 888812582 A FR888812582 A FR 888812582A FR 8812582 A FR8812582 A FR 8812582A FR 2621172 B1 FR2621172 B1 FR 2621172B1
- Authority
- FR
- France
- Prior art keywords
- semiconductor devices
- ohmic contact
- manufacturing semiconductor
- manufacturing
- ohmic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/019—Contacts of silicides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870010932A KR900008868B1 (ko) | 1987-09-30 | 1987-09-30 | 저항성 접촉을 갖는 반도체 장치의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2621172A1 FR2621172A1 (fr) | 1989-03-31 |
FR2621172B1 true FR2621172B1 (fr) | 1991-02-01 |
Family
ID=19264899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR888812582A Expired - Lifetime FR2621172B1 (fr) | 1987-09-30 | 1988-09-27 | Procede de fabrication de dispositifs a semiconducteur ayant un contact ohmique |
Country Status (7)
Country | Link |
---|---|
US (1) | US5013686A (fr) |
JP (1) | JPH01109748A (fr) |
KR (1) | KR900008868B1 (fr) |
DE (1) | DE3831288A1 (fr) |
FR (1) | FR2621172B1 (fr) |
GB (1) | GB2210503B (fr) |
NL (1) | NL190680C (fr) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01108834U (fr) * | 1988-01-12 | 1989-07-24 | ||
US5200356A (en) * | 1988-07-29 | 1993-04-06 | Sharp Kabushiki Kaisha | Method of forming a static random access memory device |
JP2858837B2 (ja) * | 1989-12-27 | 1999-02-17 | 三洋電機株式会社 | 半導体装置の製造方法 |
US5483104A (en) * | 1990-01-12 | 1996-01-09 | Paradigm Technology, Inc. | Self-aligning contact and interconnect structure |
US5166771A (en) * | 1990-01-12 | 1992-11-24 | Paradigm Technology, Inc. | Self-aligning contact and interconnect structure |
US5168076A (en) * | 1990-01-12 | 1992-12-01 | Paradigm Technology, Inc. | Method of fabricating a high resistance polysilicon load resistor |
US5172211A (en) * | 1990-01-12 | 1992-12-15 | Paradigm Technology, Inc. | High resistance polysilicon load resistor |
US5541131A (en) * | 1991-02-01 | 1996-07-30 | Taiwan Semiconductor Manufacturing Co. | Peeling free metal silicide films using ion implantation |
US5346836A (en) * | 1991-06-06 | 1994-09-13 | Micron Technology, Inc. | Process for forming low resistance contacts between silicide areas and upper level polysilicon interconnects |
EP0541122B1 (fr) * | 1991-11-08 | 1997-09-24 | Nec Corporation | Procédé de fabrication d'un dispositif semi-conducteur comportant une couche résistive en silicium polycristallin |
TW230266B (fr) * | 1993-01-26 | 1994-09-11 | American Telephone & Telegraph | |
US5395799A (en) * | 1993-10-04 | 1995-03-07 | At&T Corp. | Method of fabricating semiconductor devices having electrodes comprising layers of doped tungsten disilicide |
DE19521006C2 (de) | 1994-06-08 | 2000-02-17 | Hyundai Electronics Ind | Halbleiterbauelement und Verfahren zu seiner Herstellung |
US5472896A (en) * | 1994-11-14 | 1995-12-05 | United Microelectronics Corp. | Method for fabricating polycide gate MOSFET devices |
US6019906A (en) * | 1998-05-29 | 2000-02-01 | Taiwan Semiconductor Manufacturing Company | Hard masking method for forming patterned oxygen containing plasma etchable layer |
JP2000124219A (ja) | 1998-08-11 | 2000-04-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR100767540B1 (ko) * | 2001-04-13 | 2007-10-17 | 후지 덴키 홀딩스 가부시끼가이샤 | 반도체 장치 |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4128670A (en) * | 1977-11-11 | 1978-12-05 | International Business Machines Corporation | Fabrication method for integrated circuits with polysilicon lines having low sheet resistance |
JPS5582458A (en) * | 1978-12-18 | 1980-06-21 | Toshiba Corp | Preparation of semiconductor device |
CA1142261A (fr) * | 1979-06-29 | 1983-03-01 | Siegfried K. Wiedmann | Methode d'interconnexion de regions semiconductrices de types opposes |
DE2926874A1 (de) * | 1979-07-03 | 1981-01-22 | Siemens Ag | Verfahren zum herstellen von niederohmigen, diffundierten bereichen bei der silizium-gate-technologie |
US4388121A (en) * | 1980-03-21 | 1983-06-14 | Texas Instruments Incorporated | Reduced field implant for dynamic memory cell array |
GB2077993A (en) * | 1980-06-06 | 1981-12-23 | Standard Microsyst Smc | Low sheet resistivity composite conductor gate MOS device |
US4398335A (en) * | 1980-12-09 | 1983-08-16 | Fairchild Camera & Instrument Corporation | Multilayer metal silicide interconnections for integrated circuits |
JPS57102049A (en) * | 1980-12-17 | 1982-06-24 | Fujitsu Ltd | Formation of multilayer wiring |
JPS5832446A (ja) * | 1981-08-20 | 1983-02-25 | Sanyo Electric Co Ltd | シリサイドの形成方法 |
DE3138960A1 (de) * | 1981-09-30 | 1983-04-14 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur erzeugung elektrisch leitender schichten |
US4597153A (en) * | 1982-11-19 | 1986-07-01 | General Motors Corporation | Method for mounting plastic body panel |
US4443930A (en) * | 1982-11-30 | 1984-04-24 | Ncr Corporation | Manufacturing method of silicide gates and interconnects for integrated circuits |
US4450620A (en) * | 1983-02-18 | 1984-05-29 | Bell Telephone Laboratories, Incorporated | Fabrication of MOS integrated circuit devices |
US4528582A (en) * | 1983-09-21 | 1985-07-09 | General Electric Company | Interconnection structure for polycrystalline silicon resistor and methods of making same |
US4519126A (en) * | 1983-12-12 | 1985-05-28 | Rca Corporation | Method of fabricating high speed CMOS devices |
IT1213120B (it) * | 1984-01-10 | 1989-12-14 | Ates Componenti Elettron | Processo per la fabbricazione di transistori mos complementari a basse tensioni di soglia in circuiti integrati ad alta densita' e struttura da esso risultante. |
US4555842A (en) * | 1984-03-19 | 1985-12-03 | At&T Bell Laboratories | Method of fabricating VLSI CMOS devices having complementary threshold voltages |
US4640844A (en) * | 1984-03-22 | 1987-02-03 | Siemens Aktiengesellschaft | Method for the manufacture of gate electrodes formed of double layers of metal silicides having a high melting point and doped polycrystalline silicon |
US4581623A (en) * | 1984-05-24 | 1986-04-08 | Motorola, Inc. | Interlayer contact for use in a static RAM cell |
KR940002772B1 (ko) * | 1984-08-31 | 1994-04-02 | 가부시기가이샤 히다찌세이사꾸쇼 | 반도체 집적회로 장치 및 그 제조방법 |
US4663825A (en) * | 1984-09-27 | 1987-05-12 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
US4604789A (en) * | 1985-01-31 | 1986-08-12 | Inmos Corporation | Process for fabricating polysilicon resistor in polycide line |
FR2578272B1 (fr) * | 1985-03-01 | 1987-05-22 | Centre Nat Rech Scient | Procede de formation sur un substrat d'une couche de siliciure de tungstene, utilisable notamment pour la realisation de couches d'interconnexion des circuits integres. |
US4740479A (en) * | 1985-07-05 | 1988-04-26 | Siemens Aktiengesellschaft | Method for the manufacture of cross-couplings between n-channel and p-channel CMOS field effect transistors of static write-read memories |
US4782033A (en) * | 1985-11-27 | 1988-11-01 | Siemens Aktiengesellschaft | Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate |
JPS62147757A (ja) * | 1985-12-21 | 1987-07-01 | Nippon Gakki Seizo Kk | 抵抗形成法 |
JPH03131875A (ja) * | 1989-10-17 | 1991-06-05 | Nec Niigata Ltd | 液晶シャッタ式電子写真プリンタ |
-
1987
- 1987-09-30 KR KR1019870010932A patent/KR900008868B1/ko not_active IP Right Cessation
-
1988
- 1988-09-14 DE DE3831288A patent/DE3831288A1/de not_active Ceased
- 1988-09-26 JP JP63239104A patent/JPH01109748A/ja active Granted
- 1988-09-27 NL NL8802375A patent/NL190680C/xx not_active IP Right Cessation
- 1988-09-27 FR FR888812582A patent/FR2621172B1/fr not_active Expired - Lifetime
- 1988-09-29 GB GB8822855A patent/GB2210503B/en not_active Expired - Lifetime
- 1988-09-30 US US07/252,514 patent/US5013686A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
NL190680B (nl) | 1994-01-17 |
US5013686A (en) | 1991-05-07 |
NL8802375A (nl) | 1989-04-17 |
JPH01109748A (ja) | 1989-04-26 |
GB2210503A (en) | 1989-06-07 |
GB2210503B (en) | 1991-01-09 |
DE3831288A1 (de) | 1989-04-20 |
KR900008868B1 (ko) | 1990-12-11 |
GB8822855D0 (en) | 1988-11-02 |
JPH0423423B2 (fr) | 1992-04-22 |
KR890005840A (ko) | 1989-05-17 |
NL190680C (nl) | 1994-06-16 |
FR2621172A1 (fr) | 1989-03-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TP | Transmission of property |