FR2519460B1 - Agencement de memoire pouvant fonctionner en antememoire et en memoire locale - Google Patents

Agencement de memoire pouvant fonctionner en antememoire et en memoire locale

Info

Publication number
FR2519460B1
FR2519460B1 FR828221061A FR8221061A FR2519460B1 FR 2519460 B1 FR2519460 B1 FR 2519460B1 FR 828221061 A FR828221061 A FR 828221061A FR 8221061 A FR8221061 A FR 8221061A FR 2519460 B1 FR2519460 B1 FR 2519460B1
Authority
FR
France
Prior art keywords
memory
call
working
arrangement capable
local memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR828221061A
Other languages
English (en)
Other versions
FR2519460A1 (fr
Inventor
Tadashi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Publication of FR2519460A1 publication Critical patent/FR2519460A1/fr
Application granted granted Critical
Publication of FR2519460B1 publication Critical patent/FR2519460B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/251—Local memory within processor subsystem
    • G06F2212/2515—Local memory within processor subsystem being configurable for different purposes, e.g. as cache or non-cache memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/601—Reconfiguration of cache memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Small-Scale Networks (AREA)
FR828221061A 1981-12-15 1982-12-15 Agencement de memoire pouvant fonctionner en antememoire et en memoire locale Expired - Lifetime FR2519460B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56200895A JPS58102381A (ja) 1981-12-15 1981-12-15 バツフアメモリ

Publications (2)

Publication Number Publication Date
FR2519460A1 FR2519460A1 (fr) 1983-07-08
FR2519460B1 true FR2519460B1 (fr) 1990-09-14

Family

ID=16432035

Family Applications (1)

Application Number Title Priority Date Filing Date
FR828221061A Expired - Lifetime FR2519460B1 (fr) 1981-12-15 1982-12-15 Agencement de memoire pouvant fonctionner en antememoire et en memoire locale

Country Status (3)

Country Link
US (1) US4580240A (fr)
JP (1) JPS58102381A (fr)
FR (1) FR2519460B1 (fr)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6015771A (ja) * 1983-07-08 1985-01-26 Hitachi Ltd ベクトルプロセッサ
JPS60142450A (ja) * 1983-12-28 1985-07-27 Fujitsu Ltd 記憶システム
JPS6184753A (ja) * 1984-10-01 1986-04-30 Hitachi Ltd バツフアメモリ
US4991081A (en) * 1984-10-31 1991-02-05 Texas Instruments Incorporated Cache memory addressable by both physical and virtual addresses
US5210833A (en) * 1985-11-08 1993-05-11 Nec Corporation System for selectively masking data in a branch address register and replacing the microinstruction address register by the masked data
US4768148A (en) * 1986-06-27 1988-08-30 Honeywell Bull Inc. Read in process memory apparatus
US5155833A (en) * 1987-05-11 1992-10-13 At&T Bell Laboratories Multi-purpose cache memory selectively addressable either as a boot memory or as a cache memory
US5184320A (en) * 1988-02-12 1993-02-02 Texas Instruments Incorporated Cached random access memory device and system
US5111423A (en) * 1988-07-21 1992-05-05 Altera Corporation Programmable interface for computer system peripheral circuit card
JPH0786847B2 (ja) * 1988-08-09 1995-09-20 松下電器産業株式会社 キャッシュメモリ
GB8823077D0 (en) * 1988-09-30 1988-11-09 Int Computers Ltd Data processing apparatus
US6092153A (en) * 1988-11-14 2000-07-18 Lass; Stanley Edwin Subsettable top level cache
JPH02226419A (ja) * 1989-02-28 1990-09-10 Sharp Corp データ配列変換制御方式
US5072422A (en) * 1989-05-15 1991-12-10 E-Systems, Inc. Content-addressed memory system with word cells having select and match bits
JPH0348951A (ja) * 1989-07-18 1991-03-01 Fujitsu Ltd アドレスモニタ装置
US5016219A (en) * 1990-02-12 1991-05-14 Vlsi Technology, Inc. Computer memory write protection circuit
US5446865A (en) * 1990-03-13 1995-08-29 At&T Corp. Processor adapted for sharing memory with more than one type of processor
US5491806A (en) * 1990-06-26 1996-02-13 Lsi Logic Corporation Optimized translation lookaside buffer slice having stored mask bits
JPH0476626A (ja) * 1990-07-13 1992-03-11 Toshiba Corp マイクロコンピュータ
JP2594695B2 (ja) * 1990-10-01 1997-03-26 日本電気株式会社 制御メモリ誤り訂正機構
US5291442A (en) * 1990-10-31 1994-03-01 International Business Machines Corporation Method and apparatus for dynamic cache line sectoring in multiprocessor systems
US5278972A (en) * 1990-11-21 1994-01-11 At&T Bell Laboratories Communication system for converting ISDN signaling protocol between local and public network having first group of mandatory elements and second group of non-mandatory elements
US5210845A (en) * 1990-11-28 1993-05-11 Intel Corporation Controller for two-way set associative cache
JP2763207B2 (ja) * 1991-04-25 1998-06-11 株式会社東芝 情報処理装置
GB9118312D0 (en) * 1991-08-24 1991-10-09 Motorola Inc Real time cache implemented by dual purpose on-chip memory
SG52380A1 (en) * 1991-09-23 1998-09-28 Intel Corp A computer system and method for executing interrupt instructions in two operating modes
US5367659A (en) * 1991-09-30 1994-11-22 Intel Corporation Tag initialization in a controller for two-way set associative cache
JP3172214B2 (ja) * 1991-09-30 2001-06-04 富士通株式会社 状態モード設定方式
US5438669A (en) * 1991-11-20 1995-08-01 Hitachi, Ltd. Data processor with improved loop handling utilizing improved register allocation
US5509139A (en) * 1993-03-22 1996-04-16 Compaq Computer Corp. Circuit for disabling an address masking control signal using OR gate when a microprocessor is in a system management mode
JP3713312B2 (ja) * 1994-09-09 2005-11-09 株式会社ルネサステクノロジ データ処理装置
US5651134A (en) * 1994-10-26 1997-07-22 Ncr Corporation Method for configuring a cache memory to store only data, only code, or code and data based on the operating characteristics of the application program
US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US6101590A (en) 1995-10-10 2000-08-08 Micro Unity Systems Engineering, Inc. Virtual memory system with local and global virtual address translation
US5857116A (en) * 1995-10-27 1999-01-05 Compaq Computer Corporation Circuit for disabling an address masking control signal when a microprocessor is in a system management mode
US6009504A (en) * 1996-09-27 1999-12-28 Intel Corporation Apparatus and method for storing data associated with multiple addresses in a storage element using a base address and a mask
JPH11306084A (ja) * 1998-04-23 1999-11-05 Fujitsu Ltd 情報処理装置及び記憶媒体
EP1045307B1 (fr) * 1999-04-16 2006-07-12 Infineon Technologies North America Corp. Reconfiguration dynamique de l'antémémoire d'un micro-contrôleur
WO2001037099A1 (fr) * 1999-11-16 2001-05-25 Infineon Technologies Ag Memoire destinee a l'unite centrale d'une unite de calcul
US6725369B1 (en) * 2000-04-28 2004-04-20 Hewlett-Packard Development Company, L.P. Circuit for allowing data return in dual-data formats
US20040103272A1 (en) * 2002-11-27 2004-05-27 Zimmer Vincent J. Using a processor cache as RAM during platform initialization

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3518631A (en) * 1967-01-13 1970-06-30 Ibm Associative memory system which can be addressed associatively or conventionally
NL7317545A (nl) * 1973-12-21 1975-06-24 Philips Nv Geheugensysteem met hoofd- en buffergeheugen.
JPS5226124A (en) * 1975-08-22 1977-02-26 Fujitsu Ltd Buffer memory control unit
DE2547488C2 (de) * 1975-10-23 1982-04-15 Ibm Deutschland Gmbh, 7000 Stuttgart Mikroprogrammierte Datenverarbeitungsanlage
US4045781A (en) * 1976-02-13 1977-08-30 Digital Equipment Corporation Memory module with selectable byte addressing for digital data processing system
FR2348544A1 (fr) * 1976-04-15 1977-11-10 Honeywell Bull Soc Ind Ensemble double de memoire associative
US4354232A (en) * 1977-12-16 1982-10-12 Honeywell Information Systems Inc. Cache memory command buffer circuit
JPS54128634A (en) * 1978-03-30 1979-10-05 Toshiba Corp Cash memory control system
JPS5687282A (en) * 1979-12-14 1981-07-15 Nec Corp Data processor

Also Published As

Publication number Publication date
JPS58102381A (ja) 1983-06-17
FR2519460A1 (fr) 1983-07-08
JPS6136667B2 (fr) 1986-08-19
US4580240A (en) 1986-04-01

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Legal Events

Date Code Title Description
ST Notification of lapse