FR2455361A1 - Procede pour fabriquer un transistor a effet de champ a porte isolee et transistor fabrique a l'aide d'un tel procede - Google Patents

Procede pour fabriquer un transistor a effet de champ a porte isolee et transistor fabrique a l'aide d'un tel procede

Info

Publication number
FR2455361A1
FR2455361A1 FR8008773A FR8008773A FR2455361A1 FR 2455361 A1 FR2455361 A1 FR 2455361A1 FR 8008773 A FR8008773 A FR 8008773A FR 8008773 A FR8008773 A FR 8008773A FR 2455361 A1 FR2455361 A1 FR 2455361A1
Authority
FR
France
Prior art keywords
mask
nitride
oxidation
application
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8008773A
Other languages
English (en)
French (fr)
Other versions
FR2455361B1 (enExample
Inventor
Pieter Johannes Wilhel Jochems
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of FR2455361A1 publication Critical patent/FR2455361A1/fr
Application granted granted Critical
Publication of FR2455361B1 publication Critical patent/FR2455361B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Local Oxidation Of Silicon (AREA)
FR8008773A 1979-04-23 1980-04-18 Procede pour fabriquer un transistor a effet de champ a porte isolee et transistor fabrique a l'aide d'un tel procede Granted FR2455361A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7903158A NL7903158A (nl) 1979-04-23 1979-04-23 Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.

Publications (2)

Publication Number Publication Date
FR2455361A1 true FR2455361A1 (fr) 1980-11-21
FR2455361B1 FR2455361B1 (enExample) 1983-04-29

Family

ID=19833027

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8008773A Granted FR2455361A1 (fr) 1979-04-23 1980-04-18 Procede pour fabriquer un transistor a effet de champ a porte isolee et transistor fabrique a l'aide d'un tel procede

Country Status (10)

Country Link
US (1) US4343079A (enExample)
JP (1) JPS55141758A (enExample)
AU (1) AU537858B2 (enExample)
CA (1) CA1146675A (enExample)
CH (1) CH653482A5 (enExample)
DE (1) DE3015101A1 (enExample)
FR (1) FR2455361A1 (enExample)
GB (1) GB2047961B (enExample)
IT (1) IT1140878B (enExample)
NL (1) NL7903158A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5252505A (en) * 1979-05-25 1993-10-12 Hitachi, Ltd. Method for manufacturing a semiconductor device
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
JPS60106142A (ja) * 1983-11-15 1985-06-11 Nec Corp 半導体素子の製造方法
US4675982A (en) * 1985-10-31 1987-06-30 International Business Machines Corporation Method of making self-aligned recessed oxide isolation regions
DE69324637T2 (de) 1992-07-31 1999-12-30 Hughes Electronics Corp., El Segundo Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2094036A1 (enExample) * 1970-06-04 1972-02-04 Philips Nv
FR2130397A1 (enExample) * 1971-03-17 1972-11-03 Philips Nv
FR2154778A1 (enExample) * 1971-10-02 1973-05-11 Philips Nv
US3825455A (en) * 1971-03-19 1974-07-23 Nippon Electric Co Method of producing insulated-gate field-effect semiconductor device having a channel stopper region

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3698966A (en) * 1970-02-26 1972-10-17 North American Rockwell Processes using a masking layer for producing field effect devices having oxide isolation
FR2134290B1 (enExample) * 1971-04-30 1977-03-18 Texas Instruments France
US4023195A (en) * 1974-10-23 1977-05-10 Smc Microsystems Corporation MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions
US4013484A (en) * 1976-02-25 1977-03-22 Intel Corporation High density CMOS process
JPS52131483A (en) * 1976-04-28 1977-11-04 Hitachi Ltd Mis-type semiconductor device
NL185376C (nl) * 1976-10-25 1990-03-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
JPS53123661A (en) * 1977-04-04 1978-10-28 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS53123678A (en) * 1977-04-04 1978-10-28 Nec Corp Manufacture of field effect semiconductor device of insulation gate type
JPS53144280A (en) * 1977-05-23 1978-12-15 Hitachi Ltd Mis semiconductor device
US4268950A (en) * 1978-06-05 1981-05-26 Texas Instruments Incorporated Post-metal ion implant programmable MOS read only memory
US4168999A (en) * 1978-12-26 1979-09-25 Fairchild Camera And Instrument Corporation Method for forming oxide isolated integrated injection logic semiconductor structures having minimal encroachment utilizing special masking techniques

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2094036A1 (enExample) * 1970-06-04 1972-02-04 Philips Nv
FR2130397A1 (enExample) * 1971-03-17 1972-11-03 Philips Nv
US3825455A (en) * 1971-03-19 1974-07-23 Nippon Electric Co Method of producing insulated-gate field-effect semiconductor device having a channel stopper region
FR2154778A1 (enExample) * 1971-10-02 1973-05-11 Philips Nv

Also Published As

Publication number Publication date
CH653482A5 (de) 1985-12-31
DE3015101C2 (enExample) 1990-03-29
IT1140878B (it) 1986-10-10
DE3015101A1 (de) 1980-11-06
GB2047961B (en) 1983-08-03
IT8021514A0 (it) 1980-04-18
JPS55141758A (en) 1980-11-05
US4343079A (en) 1982-08-10
AU5765180A (en) 1980-10-30
FR2455361B1 (enExample) 1983-04-29
AU537858B2 (en) 1984-07-19
NL7903158A (nl) 1980-10-27
GB2047961A (en) 1980-12-03
CA1146675A (en) 1983-05-17

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Legal Events

Date Code Title Description
ST Notification of lapse