FR2447077A1 - Unite d'antememoire a dispositif a file d'attente de commandes - Google Patents
Unite d'antememoire a dispositif a file d'attente de commandesInfo
- Publication number
- FR2447077A1 FR2447077A1 FR7930205A FR7930205A FR2447077A1 FR 2447077 A1 FR2447077 A1 FR 2447077A1 FR 7930205 A FR7930205 A FR 7930205A FR 7930205 A FR7930205 A FR 7930205A FR 2447077 A1 FR2447077 A1 FR 2447077A1
- Authority
- FR
- France
- Prior art keywords
- queue
- antememory
- unit
- buffer
- order waiting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
- G06F12/0855—Overlapped cache accessing, e.g. pipeline
Abstract
L'invention concerne une unité d'antémémoire à dispositif à file d'attente de commandes. L'antémémoire 750 est caractérisée en ce qu'elle comprend un tampon de commandes d'écriture 750-100, un tampon de bloc de transit 750-102 et une file d'attente de commandes 750-107 qui est reliée aux tampons pour assurer le classement des commandes mémorisées dans les tampons, la file d'attente étant pourvue d'une pluralité d'emplacements servant à mémoriser des informations d'adresses et d'instructions, des circuits de commande 750-113 et 114 associés à la file d'attente contrôlant le classement et l'échelonnement des commandes en vue d'exploiter au maximum la capacité des tampons. Application aux ordinateurs.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/968,311 US4225922A (en) | 1978-12-11 | 1978-12-11 | Command queue apparatus included within a cache unit for facilitating command sequencing |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2447077A1 true FR2447077A1 (fr) | 1980-08-14 |
FR2447077B1 FR2447077B1 (fr) | 1986-05-30 |
Family
ID=25514050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7930205A Expired FR2447077B1 (fr) | 1978-12-11 | 1979-12-10 | Unite d'antememoire a dispositif a file d'attente de commandes |
Country Status (7)
Country | Link |
---|---|
US (1) | US4225922A (fr) |
JP (1) | JPS5587365A (fr) |
AU (1) | AU529391B2 (fr) |
CA (1) | CA1135870A (fr) |
DE (1) | DE2948668A1 (fr) |
FR (1) | FR2447077B1 (fr) |
GB (1) | GB2037041B (fr) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4392200A (en) * | 1980-01-28 | 1983-07-05 | Digital Equipment Corporation | Cached multiprocessor system with pipeline timing |
US4425615A (en) | 1980-11-14 | 1984-01-10 | Sperry Corporation | Hierarchical memory system having cache/disk subsystem with command queues for plural disks |
US4445172A (en) * | 1980-12-31 | 1984-04-24 | Honeywell Information Systems Inc. | Data steering logic for the output of a cache memory having an odd/even bank structure |
US4410942A (en) * | 1981-03-06 | 1983-10-18 | International Business Machines Corporation | Synchronizing buffered peripheral subsystems to host operations |
US4646236A (en) * | 1981-04-17 | 1987-02-24 | International Business Machines Corp. | Pipelined control apparatus with multi-process address storage |
JPS5835627A (ja) * | 1981-08-26 | 1983-03-02 | Toshiba Corp | メモリデ−タ先取り制御方式 |
US4536836A (en) * | 1981-11-27 | 1985-08-20 | Storage Technology Corporation | Detection of sequential data stream |
AU542447B2 (en) * | 1982-02-27 | 1985-02-21 | Fujitsu Limited | System for controlling key storage unit |
US4553202A (en) * | 1982-05-06 | 1985-11-12 | International Business Machines Corporation | User controlled dialog resource switching in a multi-tasking word processor |
JPS58203554A (ja) * | 1982-05-21 | 1983-11-28 | Toshiba Corp | 演算処理装置 |
JPS59136859A (ja) * | 1983-01-27 | 1984-08-06 | Nec Corp | バツフア制御装置 |
US4510581A (en) * | 1983-02-14 | 1985-04-09 | Prime Computer, Inc. | High speed buffer allocation apparatus |
US4660143A (en) * | 1984-09-24 | 1987-04-21 | The United States Of America As Represented By The Secretary Of The Air Force | Programmable realtime interface between a Block Floating Point processor and memory |
US4637024A (en) * | 1984-11-02 | 1987-01-13 | International Business Machines Corporation | Redundant page identification for a catalogued memory |
US5287468A (en) * | 1987-06-03 | 1994-02-15 | Sony Corporation | Method and apparatus for processing information data |
JP2982875B2 (ja) * | 1987-12-28 | 1999-11-29 | 株式会社日立製作所 | スレーブ制御装置 |
US5023776A (en) * | 1988-02-22 | 1991-06-11 | International Business Machines Corp. | Store queue for a tightly coupled multiple processor configuration with two-level cache buffer storage |
EP0425550B1 (fr) * | 1988-06-30 | 1995-01-04 | Wang Laboratories, Inc. | Unite de commande de memoire |
US6092153A (en) * | 1988-11-14 | 2000-07-18 | Lass; Stanley Edwin | Subsettable top level cache |
US5239633A (en) * | 1989-03-24 | 1993-08-24 | Mitsubishi Denki Kabushiki Kaisha | Data processor executing memory indirect addressing and register indirect addressing |
US5423016A (en) * | 1992-02-24 | 1995-06-06 | Unisys Corporation | Block buffer for instruction/operand caches |
US5375223A (en) * | 1993-01-07 | 1994-12-20 | International Business Machines Corporation | Single register arbiter circuit |
US5724533A (en) * | 1995-11-17 | 1998-03-03 | Unisys Corporation | High performance instruction data path |
US5838631A (en) | 1996-04-19 | 1998-11-17 | Integrated Device Technology, Inc. | Fully synchronous pipelined ram |
US5867699A (en) * | 1996-07-25 | 1999-02-02 | Unisys Corporation | Instruction flow control for an instruction processor |
US6029226A (en) * | 1996-09-30 | 2000-02-22 | Lsi Logic Corporation | Method and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command |
US6000011A (en) * | 1996-12-09 | 1999-12-07 | International Business Machines Corporation | Multi-entry fully associative transition cache |
US6041286A (en) * | 1997-10-21 | 2000-03-21 | Sony Corporation | Apparatus for and method of accurately obtaining the cycle time of completion of transmission of video frames within an isochronous stream of data transmitted over an IEEE 1394 serial bus network |
US6115320A (en) | 1998-02-23 | 2000-09-05 | Integrated Device Technology, Inc. | Separate byte control on fully synchronous pipelined SRAM |
US7069406B2 (en) | 1999-07-02 | 2006-06-27 | Integrated Device Technology, Inc. | Double data rate synchronous SRAM with 100% bus utilization |
US6775757B1 (en) * | 1999-12-14 | 2004-08-10 | Genesis Microchip Inc. | Multi-component processor |
US6738884B1 (en) * | 1999-12-14 | 2004-05-18 | Genesis Microchip Inc. | Method and apparatus for processing data with semaphores |
US6920543B1 (en) * | 1999-12-14 | 2005-07-19 | Genesis Microchip, Inc. | Method and apparatus for performing distributed processing of program code |
KR100533021B1 (ko) * | 2002-11-14 | 2005-12-02 | 엘지전자 주식회사 | 무선 주파수 통신 시스템의 자동 이득 조정 장치 |
US20140195777A1 (en) * | 2013-01-10 | 2014-07-10 | International Business Machines Corporation | Variable depth instruction fifos to implement simd architecture |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1487681A (en) * | 1974-01-17 | 1977-10-05 | Honeywell Inf Systems | Electronic data processing systems |
US4075686A (en) * | 1976-12-30 | 1978-02-21 | Honeywell Information Systems Inc. | Input/output cache system including bypass capability |
GB2010547A (en) * | 1977-12-16 | 1979-06-27 | Honeywell Inf Systems | Command Buffer for Cache Memory |
FR2425110A1 (fr) * | 1977-11-22 | 1979-11-30 | Honeywell Inf Systems | Systeme de traitement de donnees a antememoire |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5420097B2 (fr) * | 1973-12-28 | 1979-07-20 | ||
US3967247A (en) * | 1974-11-11 | 1976-06-29 | Sperry Rand Corporation | Storage interface unit |
US3964054A (en) * | 1975-06-23 | 1976-06-15 | International Business Machines Corporation | Hierarchy response priority adjustment mechanism |
US4092713A (en) * | 1977-06-13 | 1978-05-30 | Sperry Rand Corporation | Post-write address word correction in cache memory system |
-
1978
- 1978-12-11 US US05/968,311 patent/US4225922A/en not_active Expired - Lifetime
-
1979
- 1979-11-06 CA CA000339300A patent/CA1135870A/fr not_active Expired
- 1979-11-12 GB GB7939086A patent/GB2037041B/en not_active Expired
- 1979-11-15 AU AU52874/79A patent/AU529391B2/en not_active Ceased
- 1979-12-04 DE DE19792948668 patent/DE2948668A1/de not_active Withdrawn
- 1979-12-10 FR FR7930205A patent/FR2447077B1/fr not_active Expired
- 1979-12-11 JP JP15988379A patent/JPS5587365A/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1487681A (en) * | 1974-01-17 | 1977-10-05 | Honeywell Inf Systems | Electronic data processing systems |
US4075686A (en) * | 1976-12-30 | 1978-02-21 | Honeywell Information Systems Inc. | Input/output cache system including bypass capability |
FR2425110A1 (fr) * | 1977-11-22 | 1979-11-30 | Honeywell Inf Systems | Systeme de traitement de donnees a antememoire |
GB2010547A (en) * | 1977-12-16 | 1979-06-27 | Honeywell Inf Systems | Command Buffer for Cache Memory |
Also Published As
Publication number | Publication date |
---|---|
CA1135870A (fr) | 1982-11-16 |
DE2948668A1 (de) | 1980-06-12 |
GB2037041A (en) | 1980-07-02 |
JPS5587365A (en) | 1980-07-02 |
AU529391B2 (en) | 1983-06-02 |
US4225922A (en) | 1980-09-30 |
AU5287479A (en) | 1980-07-17 |
FR2447077B1 (fr) | 1986-05-30 |
GB2037041B (en) | 1983-05-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |