ES8801050A1 - Dispositivo de interfar para la transferencia directa de datos entre un conmutador inteligente y un medio de almacenamiento de un microprocesador. - Google Patents

Dispositivo de interfar para la transferencia directa de datos entre un conmutador inteligente y un medio de almacenamiento de un microprocesador.

Info

Publication number
ES8801050A1
ES8801050A1 ES549820A ES549820A ES8801050A1 ES 8801050 A1 ES8801050 A1 ES 8801050A1 ES 549820 A ES549820 A ES 549820A ES 549820 A ES549820 A ES 549820A ES 8801050 A1 ES8801050 A1 ES 8801050A1
Authority
ES
Spain
Prior art keywords
interface
address
information transfer
direct information
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES549820A
Other languages
English (en)
Other versions
ES549820A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES549820A0 publication Critical patent/ES549820A0/es
Publication of ES8801050A1 publication Critical patent/ES8801050A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54516—Initialization, software or data downloading
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1305—Software aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13109—Initializing, personal profile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13376—Information service, downloading of information, 0800/0900 services

Abstract

DISPOSITIVO DE INTERFAZ PARA LA TRANSFERENCIA DIRECTA DE DATOS ENTRE UN CONMUTADOR INTELIGENTE Y UN MEDIO DE ALMACENAMIENTO DE UN MICROPROCESADOR. CONSTA DE UNA MEMORIA DE ENTRADA DE ALMACENAMIENTO TEMPORAL (12) DE ENTRADA; DE UNA MEMORIA DE ALMACENAMIENTO TEMPORAL (14) DE SALIDA; DE UN MEDIO DE ALMACENAMIENTO DE LA DIRECCION (16); DE UN CONTROLADOR DEL INTERFACE (18); DE MEDIOS PARA LA ACEPTACION DE DATOS DESDE EL CONMUTADOR INTELIGENTE (30); DE MEDIOS PARA LA PRESENTACION DE DATOS A DICHO CONMUTADOR INTELIGENTE (30); Y DE MEDIOS PARA EL ALMACENAMIENTO DE UNA DIRECCION, ESTANDO DICHA DIRECCION ASOCIADA CON UNA POSICION DE DICHO MEDIO DE ALMACENAMIENTO DEL MICROPROCESADOR.
ES549820A 1984-12-14 1985-12-11 Dispositivo de interfar para la transferencia directa de datos entre un conmutador inteligente y un medio de almacenamiento de un microprocesador. Expired ES8801050A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/682,034 US4922416A (en) 1984-12-14 1984-12-14 Interface device end message storing with register and interrupt service registers for directing segmented message transfer between intelligent switch and microcomputer

Publications (2)

Publication Number Publication Date
ES549820A0 ES549820A0 (es) 1987-12-01
ES8801050A1 true ES8801050A1 (es) 1987-12-01

Family

ID=24737920

Family Applications (1)

Application Number Title Priority Date Filing Date
ES549820A Expired ES8801050A1 (es) 1984-12-14 1985-12-11 Dispositivo de interfar para la transferencia directa de datos entre un conmutador inteligente y un medio de almacenamiento de un microprocesador.

Country Status (6)

Country Link
US (1) US4922416A (es)
EP (1) EP0185260B1 (es)
JP (1) JPH0650863B2 (es)
AU (1) AU582606B2 (es)
DE (1) DE3585993D1 (es)
ES (1) ES8801050A1 (es)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3743387A1 (de) * 1987-12-21 1989-06-29 Siemens Ag Verfahren und anordnung zur datenuebertragung zwischen einer virtuellen speichereinheit und einer buseinheit
EP0325080B1 (en) * 1988-01-22 1994-04-20 International Business Machines Corporation Protocol and apparatus for the selective scanning of a plurality of lines connected to a communication device
DE3874517T2 (de) * 1988-01-22 1993-04-08 Ibm Abtasterschnittstelle fuer leitungsadapter einer uebertragungssteuerung.
EP0427407A3 (en) * 1989-11-03 1993-03-10 Compaq Computer Corporation Parallel port with direct memory access capabilities
US6408346B1 (en) * 1989-11-03 2002-06-18 Compaq Computer Corporation System for communicating with an external device using a parallel port with DMA capabilities and for developing a signal to indicate the availability of data
CA2050507C (en) * 1990-10-26 1999-07-13 Lane Jordon Abrams Message-oriented bank controller interface
US5542076A (en) * 1991-06-14 1996-07-30 Digital Equipment Corporation Method and apparatus for adaptive interrupt servicing in data processing system
US5388237A (en) * 1991-12-30 1995-02-07 Sun Microsystems, Inc. Method of and apparatus for interleaving multiple-channel DMA operations
FR2686991A1 (fr) * 1992-02-05 1993-07-30 Sextant Avionique Procede, systeme et processeur de communication entre une pluralite de sous-ensembles d'un equipement.
EP0562353A3 (de) * 1992-03-27 2004-08-18 Siemens Aktiengesellschaft Verfahren zum Übertragen hochpriorer Programme und Daten in einem Kommunikationssystem
US6597690B1 (en) * 1999-01-22 2003-07-22 Intel Corporation Method and apparatus employing associative memories to implement limited switching
US6570887B2 (en) * 1999-01-22 2003-05-27 Intel Corporation Method and apparatus employing associative memories to implement message passing
US6708244B2 (en) * 1999-07-22 2004-03-16 Cypress Semiconductor Corp. Optimized I2O messaging unit
US7281030B1 (en) * 1999-09-17 2007-10-09 Intel Corporation Method of reading a remote memory

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4004277A (en) * 1974-05-29 1977-01-18 Gavril Bruce D Switching system for non-symmetrical sharing of computer peripheral equipment
US4247893A (en) * 1977-01-03 1981-01-27 Motorola, Inc. Memory interface device with processing capability
US4403282A (en) * 1978-01-23 1983-09-06 Data General Corporation Data processing system using a high speed data channel for providing direct memory access for block data transfers
JPS5633730A (en) * 1979-08-24 1981-04-04 Omron Tateisi Electronics Co Communication control method
US4355388A (en) * 1979-09-27 1982-10-19 Communications Satellite Corporation Microprogrammable TDMA terminal controller
US4491916A (en) * 1979-11-05 1985-01-01 Litton Resources Systems, Inc. Large volume, high speed data processor
US4387433A (en) * 1980-12-24 1983-06-07 International Business Machines Corporation High speed data interface buffer for digitally controlled electron beam exposure system
US4400772A (en) * 1980-12-30 1983-08-23 International Memories, Inc. Method and apparatus for direct memory access in a data processing system
JPS57153359A (en) * 1981-03-18 1982-09-21 Ibm Data processing system with common memory
US4417245A (en) * 1981-09-02 1983-11-22 International Business Machines Corp. Digital space division exchange
DE3276916D1 (en) * 1981-09-18 1987-09-10 Rovsing As Christian Multiprocessor computer system
EP0077863B1 (fr) * 1981-10-28 1986-09-17 International Business Machines Corporation Dispositif de balayage de lignes de communications destiné à un contrôleur de communications
FR2531244B1 (fr) * 1982-07-27 1987-05-15 Debesson Pierre Systeme de detection de codes d'arret programmables dans un transfert de donnees intervenant entre une memoire locale d'un microprocesseur et un peripherique, dans un ensemble processeur utilisant un circuit d'acces direct a la memoire locale
DE3241378A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Integrierte mikroprogrammierte vorrichtung zur steuerung von informationsverarbeitungsablaeufen und verfahren zu ihrem betrieb
US4654654A (en) * 1983-02-07 1987-03-31 At&T Bell Laboratories Data network acknowledgement arrangement
US4549263A (en) * 1983-02-14 1985-10-22 Texas Instruments Incorporated Device interface controller for input/output controller
US4570258A (en) * 1984-02-13 1986-02-11 Wang Laboratories, Inc. Exchange switch
US4704606A (en) * 1984-11-13 1987-11-03 American Telephone And Telegraph Company And At&T Information Systems Inc. Variable length packet switching system

Also Published As

Publication number Publication date
EP0185260A3 (en) 1988-10-05
AU582606B2 (en) 1989-04-06
EP0185260A2 (de) 1986-06-25
AU5103785A (en) 1986-06-19
EP0185260B1 (de) 1992-05-06
JPS61143865A (ja) 1986-07-01
DE3585993D1 (de) 1992-06-11
US4922416A (en) 1990-05-01
ES549820A0 (es) 1987-12-01
JPH0650863B2 (ja) 1994-06-29

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