FR2445988A1 - Dispositif d'adressage perfectionne d'un systeme de traitement de donnees - Google Patents

Dispositif d'adressage perfectionne d'un systeme de traitement de donnees

Info

Publication number
FR2445988A1
FR2445988A1 FR7931456A FR7931456A FR2445988A1 FR 2445988 A1 FR2445988 A1 FR 2445988A1 FR 7931456 A FR7931456 A FR 7931456A FR 7931456 A FR7931456 A FR 7931456A FR 2445988 A1 FR2445988 A1 FR 2445988A1
Authority
FR
France
Prior art keywords
addressing
bus
processing system
data processing
usart
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7931456A
Other languages
English (en)
French (fr)
Other versions
FR2445988B1 (xx
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/000,314 external-priority patent/US4257101A/en
Priority claimed from US06/000,463 external-priority patent/US4290104A/en
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2445988A1 publication Critical patent/FR2445988A1/fr
Application granted granted Critical
Publication of FR2445988B1 publication Critical patent/FR2445988B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)
FR7931456A 1979-01-02 1979-12-21 Dispositif d'adressage perfectionne d'un systeme de traitement de donnees Granted FR2445988A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US30479A 1979-01-02 1979-01-02
US06/000,314 US4257101A (en) 1979-01-02 1979-01-02 Hardware in a computer system for maintenance by a remote computer system
US06/000,463 US4290104A (en) 1979-01-02 1979-01-02 Computer system having a paging apparatus for mapping virtual addresses to real addresses for a memory of a multiline communications controller

Publications (2)

Publication Number Publication Date
FR2445988A1 true FR2445988A1 (fr) 1980-08-01
FR2445988B1 FR2445988B1 (xx) 1985-04-19

Family

ID=27356644

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7931456A Granted FR2445988A1 (fr) 1979-01-02 1979-12-21 Dispositif d'adressage perfectionne d'un systeme de traitement de donnees

Country Status (3)

Country Link
DE (1) DE2952314A1 (xx)
FR (1) FR2445988A1 (xx)
GB (1) GB2057729B (xx)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3284778A (en) * 1962-01-04 1966-11-08 Siemens Ag Processor systems with index registers for address modification in digital computers
US3461433A (en) * 1967-01-27 1969-08-12 Sperry Rand Corp Relative addressing system for memories
GB1353311A (en) * 1971-12-23 1974-05-15 Ibm Memory system
US3909798A (en) * 1974-01-25 1975-09-30 Raytheon Co Virtual addressing method and apparatus
FR2305793A1 (fr) * 1975-03-26 1976-10-22 Honeywell Inf Systems Procede de generation des adresses d'une memoire organisee par pages
US4010451A (en) * 1972-10-03 1977-03-01 National Research Development Corporation Data structure processor
US4057847A (en) * 1976-06-14 1977-11-08 Sperry Rand Corporation Remote controlled test interface unit
GB1495332A (en) * 1974-02-26 1977-12-14 Periphonics Corp Memory having non-fixed relationships between addresses and storage locations

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3251041A (en) * 1962-04-17 1966-05-10 Melpar Inc Computer memory system
US3267462A (en) * 1963-08-13 1966-08-16 Keltec Ind Inc Transponder incorporating negative resistance amplifiers and multiport directional couplers
FR1567705A (xx) * 1967-06-09 1969-04-08
FR122199A (xx) * 1973-12-17

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3284778A (en) * 1962-01-04 1966-11-08 Siemens Ag Processor systems with index registers for address modification in digital computers
US3461433A (en) * 1967-01-27 1969-08-12 Sperry Rand Corp Relative addressing system for memories
GB1353311A (en) * 1971-12-23 1974-05-15 Ibm Memory system
US4010451A (en) * 1972-10-03 1977-03-01 National Research Development Corporation Data structure processor
US3909798A (en) * 1974-01-25 1975-09-30 Raytheon Co Virtual addressing method and apparatus
GB1495332A (en) * 1974-02-26 1977-12-14 Periphonics Corp Memory having non-fixed relationships between addresses and storage locations
FR2305793A1 (fr) * 1975-03-26 1976-10-22 Honeywell Inf Systems Procede de generation des adresses d'une memoire organisee par pages
US4057847A (en) * 1976-06-14 1977-11-08 Sperry Rand Corporation Remote controlled test interface unit

Also Published As

Publication number Publication date
DE2952314A1 (de) 1980-07-17
FR2445988B1 (xx) 1985-04-19
GB2057729B (en) 1983-08-10
GB2057729A (en) 1981-04-01
DE2952314C2 (xx) 1987-11-05

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Legal Events

Date Code Title Description
ST Notification of lapse