FR2355377A1 - Developpement, par creation sur place, de couches d'oxyde de semi-conducteur - Google Patents

Developpement, par creation sur place, de couches d'oxyde de semi-conducteur

Info

Publication number
FR2355377A1
FR2355377A1 FR7718204A FR7718204A FR2355377A1 FR 2355377 A1 FR2355377 A1 FR 2355377A1 FR 7718204 A FR7718204 A FR 7718204A FR 7718204 A FR7718204 A FR 7718204A FR 2355377 A1 FR2355377 A1 FR 2355377A1
Authority
FR
France
Prior art keywords
semiconductor oxide
development
creation
site
oxide layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7718204A
Other languages
English (en)
Other versions
FR2355377B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2355377A1 publication Critical patent/FR2355377A1/fr
Application granted granted Critical
Publication of FR2355377B1 publication Critical patent/FR2355377B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02269Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by thermal evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

L'invention concerne le développement, par création sur place, de couches d'oxyde de semi-conducteur. On développe une couche d'oxyde de semi-conducteur, créée sur place, stoéchiométrique, amorphe, avec une interface marquée entre la couche d'oxyde de semi-conducteur, créée sur place, stoéchiométrique, amorphe, avec une interface marquée entre la couche d'oxyde et le substrat, en envoyant des électrons vers un substrat semi-conducteur en présence d'oxygène. La source d'électrons peut être un simple filament. L'invention peut être mise en oeuvre avec des techniques de développement utilisant un plasma normal, en extrayant les électrons de la région de production du plasma et en les envoyant vers le substrat. L'invention s'applique à la fabrication des semi-conducteurs.
FR7718204A 1976-06-15 1977-06-14 Developpement, par creation sur place, de couches d'oxyde de semi-conducteur Granted FR2355377A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/696,282 US4062747A (en) 1976-06-15 1976-06-15 Native growth of semiconductor oxide layers

Publications (2)

Publication Number Publication Date
FR2355377A1 true FR2355377A1 (fr) 1978-01-13
FR2355377B1 FR2355377B1 (fr) 1981-06-12

Family

ID=24796425

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7718204A Granted FR2355377A1 (fr) 1976-06-15 1977-06-14 Developpement, par creation sur place, de couches d'oxyde de semi-conducteur

Country Status (11)

Country Link
US (1) US4062747A (fr)
JP (1) JPS52153664A (fr)
BE (1) BE855582A (fr)
CA (1) CA1084816A (fr)
DE (1) DE2726265A1 (fr)
ES (1) ES459808A1 (fr)
FR (1) FR2355377A1 (fr)
GB (1) GB1585558A (fr)
IT (1) IT1083514B (fr)
NL (1) NL7706533A (fr)
SE (1) SE7706617L (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023911A1 (fr) * 1979-02-14 1981-02-18 Western Electric Co Controle des proprietes de films natifs en utilisant un procede chimique a croissance selective.
EP0142450A2 (fr) * 1983-11-17 1985-05-22 Marc Berenguer Dispositif pour la réalisation de couches diélectriques minces à la surface de corps solides

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4210701A (en) * 1972-08-14 1980-07-01 Precision Thin Film Corporation Method and apparatus for depositing film on a substrate, and products produced thereby
US4144634A (en) * 1977-06-28 1979-03-20 Bell Telephone Laboratories, Incorporated Fabrication of gallium arsenide MOS devices
US4300989A (en) * 1979-10-03 1981-11-17 Bell Telephone Laboratories, Incorporated Fluorine enhanced plasma growth of native layers on silicon
US4323589A (en) * 1980-05-07 1982-04-06 International Business Machines Corporation Plasma oxidation
US4377437A (en) * 1981-05-22 1983-03-22 Bell Telephone Laboratories, Incorporated Device lithography by selective ion implantation
US4814291A (en) * 1986-02-25 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making devices having thin dielectric layers
US4874716A (en) * 1986-04-01 1989-10-17 Texas Instrument Incorporated Process for fabricating integrated circuit structure with extremely smooth polysilicone dielectric interface
US5223458A (en) * 1990-12-18 1993-06-29 Raytheon Company Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electronegative species
US5880483A (en) * 1990-12-18 1999-03-09 Shanfield; Stanley R. Semiconductor devices
JP3489334B2 (ja) * 1996-05-27 2004-01-19 ソニー株式会社 半導体装置の酸化膜形成方法および酸化膜形成装置
US6025281A (en) * 1997-12-18 2000-02-15 Motorola, Inc. Passivation of oxide-compound semiconductor interfaces
US7652326B2 (en) * 2003-05-20 2010-01-26 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US7662698B2 (en) * 2006-11-07 2010-02-16 Raytheon Company Transistor having field plate
US20080299780A1 (en) * 2007-06-01 2008-12-04 Uv Tech Systems, Inc. Method and apparatus for laser oxidation and reduction
US8319290B2 (en) 2010-06-18 2012-11-27 Fairchild Semiconductor Corporation Trench MOS barrier schottky rectifier with a planar surface using CMP techniques
CN116490786A (zh) * 2021-01-29 2023-07-25 维耶尔公司 电子束检测

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287243A (en) * 1965-03-29 1966-11-22 Bell Telephone Labor Inc Deposition of insulating films by cathode sputtering in an rf-supported discharge
LU69164A1 (fr) * 1974-01-15 1974-04-08

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023911A1 (fr) * 1979-02-14 1981-02-18 Western Electric Co Controle des proprietes de films natifs en utilisant un procede chimique a croissance selective.
EP0023911A4 (fr) * 1979-02-14 1983-03-15 Western Electric Co Controle des proprietes de films natifs en utilisant un procede chimique a croissance selective.
EP0142450A2 (fr) * 1983-11-17 1985-05-22 Marc Berenguer Dispositif pour la réalisation de couches diélectriques minces à la surface de corps solides
FR2555360A1 (fr) * 1983-11-17 1985-05-24 Berenguer Marc Dispositif pour la realisation de couches dielectriques minces a la surface de corps solides
EP0142450A3 (fr) * 1983-11-17 1985-07-10 Marc Berenguer

Also Published As

Publication number Publication date
FR2355377B1 (fr) 1981-06-12
IT1083514B (it) 1985-05-21
BE855582A (fr) 1977-10-03
NL7706533A (nl) 1977-12-19
DE2726265A1 (de) 1977-12-29
US4062747A (en) 1977-12-13
SE7706617L (sv) 1977-12-16
JPS52153664A (en) 1977-12-20
ES459808A1 (es) 1978-04-01
CA1084816A (fr) 1980-09-02
GB1585558A (en) 1981-03-04

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Legal Events

Date Code Title Description
ST Notification of lapse