FR2337917A1 - Memoire a acces direct en circuit integre - Google Patents

Memoire a acces direct en circuit integre

Info

Publication number
FR2337917A1
FR2337917A1 FR7600317A FR7600317A FR2337917A1 FR 2337917 A1 FR2337917 A1 FR 2337917A1 FR 7600317 A FR7600317 A FR 7600317A FR 7600317 A FR7600317 A FR 7600317A FR 2337917 A1 FR2337917 A1 FR 2337917A1
Authority
FR
France
Prior art keywords
column
data
memory
address
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7600317A
Other languages
English (en)
Other versions
FR2337917B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Priority to FR7600317A priority Critical patent/FR2337917A1/fr
Publication of FR2337917A1 publication Critical patent/FR2337917A1/fr
Application granted granted Critical
Publication of FR2337917B1 publication Critical patent/FR2337917B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356017Bistable circuits using additional transistors in the input circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356086Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095Bistable circuits with additional means for controlling the main nodes with synchronous operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Dram (AREA)
FR7600317A 1976-01-08 1976-01-08 Memoire a acces direct en circuit integre Granted FR2337917A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7600317A FR2337917A1 (fr) 1976-01-08 1976-01-08 Memoire a acces direct en circuit integre

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7600317A FR2337917A1 (fr) 1976-01-08 1976-01-08 Memoire a acces direct en circuit integre

Publications (2)

Publication Number Publication Date
FR2337917A1 true FR2337917A1 (fr) 1977-08-05
FR2337917B1 FR2337917B1 (fr) 1981-02-13

Family

ID=9167705

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7600317A Granted FR2337917A1 (fr) 1976-01-08 1976-01-08 Memoire a acces direct en circuit integre

Country Status (1)

Country Link
FR (1) FR2337917A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2346774A1 (fr) * 1976-03-31 1977-10-28 Honeywell Inf Systems Interface de memoire de calculateur
FR2346773A1 (fr) * 1976-03-30 1977-10-28 Honeywell Inf Systems Echantillonnage de puissance pour la realisation d'un triple-etat

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1935390A1 (de) * 1968-07-15 1970-02-05 Ibm Einrichtung zur zeitverzahnten Anschaltung integrierter steuerbarer Elemente
FR2239737A1 (fr) * 1973-08-02 1975-02-28 Texas Instruments Inc

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1935390A1 (de) * 1968-07-15 1970-02-05 Ibm Einrichtung zur zeitverzahnten Anschaltung integrierter steuerbarer Elemente
FR2239737A1 (fr) * 1973-08-02 1975-02-28 Texas Instruments Inc

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NV2087/74 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2346773A1 (fr) * 1976-03-30 1977-10-28 Honeywell Inf Systems Echantillonnage de puissance pour la realisation d'un triple-etat
FR2346774A1 (fr) * 1976-03-31 1977-10-28 Honeywell Inf Systems Interface de memoire de calculateur

Also Published As

Publication number Publication date
FR2337917B1 (fr) 1981-02-13

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Legal Events

Date Code Title Description
TP Transmission of property
CA Change of address
CD Change of name or company name
TP Transmission of property