KR920013462A - 반도체 기억장치 - Google Patents
반도체 기억장치 Download PDFInfo
- Publication number
- KR920013462A KR920013462A KR1019910018490A KR910018490A KR920013462A KR 920013462 A KR920013462 A KR 920013462A KR 1019910018490 A KR1019910018490 A KR 1019910018490A KR 910018490 A KR910018490 A KR 910018490A KR 920013462 A KR920013462 A KR 920013462A
- Authority
- KR
- South Korea
- Prior art keywords
- internal
- response
- memory cell
- signal
- instruction signal
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한 실시예인 반도체 기억장치에 있어서의 라이트인에이블용 버퍼회로 및 아웃프트인에이블용 버퍼회로의 구성을 표시하는 블럭도, 제2도는 이 발명의 다른 실시예인 반도체기억장치의 데이터 입력버퍼의 구성을 표시하는 블럭도.
Claims (1)
- 행 및 열로 이루어지는 매트릭스상으로 배열된 복수의 메모리셀로 이루어지는 메모리셀어레이, 외부로부터 주어지는 동작타이밍규정신호에 응답하여 복수의 내부 클럭신호를 발생하는 내부클럭발생수단, 외부로부터 주어지는 어드레스신호와 상기 내부클럭 발생수단으로부터의 제1의 내부클럭신호와에 응답하여 상기 메모리셀어레이로부터 대응한 메모리셀을 선택하는 선택수단, 상기 내부클럭발생수단으로부터의 제2의 내부클럭신호와 외부로부터 주어지는 출력지시신호와에 응답하여 내부출력지시신호를 발생하는 수단, 상기 내부출력지시신호에 응답하여 활성화되고, 상기 메모리셀어레이내의 상기 선택수단에 의하여 선택된 메모셀로부터 판독된 데이터를 장치의 부로 출력하는 출력수단, 상기 내부클럭발생수단으로부터의 제3의 내부클럭 신호와 외부로부터 주어지는 기록지시신호와에 응답하여 내부기록지시신호를 발생하는 내부기록지시신호발생수단, 상기 내부기록지시신호발생수단은 상기 내부출력지시신호에 응답하여 상기 내부기록지시신호의 발생을 금지하는 수단을 포함하고, 및 상기 내부기록지시 신호에 응답하여 활성화되고, 상기 메모리셀어레이내의 상기 선택 수단에 의하여 선택된 메모리셀에의 기록을 위하여 외부로부터 주어지는 기록데이터로부터 내부기록데이터를 생성하는 입력수단을 구비하는 반도체 기억장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP90-401583 | 1990-12-12 | ||
JP2401583A JPH04214290A (ja) | 1990-12-12 | 1990-12-12 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920013462A true KR920013462A (ko) | 1992-07-29 |
KR950000959B1 KR950000959B1 (ko) | 1995-02-06 |
Family
ID=18511411
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910018490A KR950000959B1 (ko) | 1990-12-12 | 1991-10-19 | 반도체기억장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5278789A (ko) |
JP (1) | JPH04214290A (ko) |
KR (1) | KR950000959B1 (ko) |
DE (1) | DE4140846C2 (ko) |
Families Citing this family (53)
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KR960001863B1 (ko) * | 1993-04-08 | 1996-02-06 | 삼성전자주식회사 | 반도체 메모리장치의 라이트신호 입력버퍼 |
GB2288255B (en) * | 1994-04-07 | 1998-03-11 | Advanced Risc Mach Ltd | Write request interlock |
US6209071B1 (en) * | 1996-05-07 | 2001-03-27 | Rambus Inc. | Asynchronous request/synchronous data dynamic random access memory |
TW328661B (en) * | 1996-07-26 | 1998-03-21 | Oki Electric Ind Co Ltd | The semiconductor apparatus |
US5903166A (en) * | 1997-03-04 | 1999-05-11 | Sgs-Thomson Microelectronics S.R.L. | Circuit for immunizing an integrated circuit from noise affecting enable signals of the integrated circuit |
KR100253565B1 (ko) * | 1997-04-25 | 2000-05-01 | 김영환 | 동기식 기억소자의 양방향 데이타 입출력 회로 및 그 제어방법 |
WO1999019874A1 (en) | 1997-10-10 | 1999-04-22 | Rambus Incorporated | Power control system for synchronous memory device |
US6430188B1 (en) * | 1998-07-08 | 2002-08-06 | Broadcom Corporation | Unified table for L2, L3, L4, switching and filtering |
US7120117B1 (en) * | 2000-08-29 | 2006-10-10 | Broadcom Corporation | Starvation free flow control in a shared memory switching device |
US7643481B2 (en) | 1999-03-17 | 2010-01-05 | Broadcom Corporation | Network switch having a programmable counter |
US6707817B1 (en) * | 1999-03-17 | 2004-03-16 | Broadcom Corporation | Method for handling IP multicast packets in network switch |
US7031302B1 (en) | 1999-05-21 | 2006-04-18 | Broadcom Corporation | High-speed stats gathering in a network switch |
EP1181792B1 (en) * | 1999-05-21 | 2010-07-14 | Broadcom Corporation | Stacked network switch configuration |
US7315552B2 (en) * | 1999-06-30 | 2008-01-01 | Broadcom Corporation | Frame forwarding in a switch fabric |
ATE381831T1 (de) * | 1999-06-30 | 2008-01-15 | Broadcom Corp | Speicherverwaltungseinheit in einer netzvermittlungsstelle |
US6567417B2 (en) * | 2000-06-19 | 2003-05-20 | Broadcom Corporation | Frame forwarding in a switch fabric |
US6859454B1 (en) | 1999-06-30 | 2005-02-22 | Broadcom Corporation | Network switch with high-speed serializing/deserializing hazard-free double data rate switching |
WO2001019040A1 (en) * | 1999-09-03 | 2001-03-15 | Broadcom Corporation | Apparatus and method for enabling voice over ip support for a network switch |
US7131001B1 (en) | 1999-10-29 | 2006-10-31 | Broadcom Corporation | Apparatus and method for secure filed upgradability with hard wired public key |
US7143294B1 (en) | 1999-10-29 | 2006-11-28 | Broadcom Corporation | Apparatus and method for secure field upgradability with unpredictable ciphertext |
US7539134B1 (en) | 1999-11-16 | 2009-05-26 | Broadcom Corporation | High speed flow control methodology |
ATE252298T1 (de) * | 1999-11-16 | 2003-11-15 | Broadcom Corp | Verfahren und netzwerkvermittlungsstelle mit datenserialisierung durch gefahrlose mehrstufige störungsfreie multiplexierung |
EP1232612B1 (en) * | 1999-11-18 | 2006-11-02 | Broadcom Corporation | Table lookup mechanism for address resolution in a packet network switch |
DE60010328T2 (de) * | 1999-12-07 | 2005-05-04 | Broadcom Corp., Irvine | Spiegelung in einer netzwerkvermittlungsstapelanordnung |
US7009973B2 (en) * | 2000-02-28 | 2006-03-07 | Broadcom Corporation | Switch using a segmented ring |
US6678678B2 (en) | 2000-03-09 | 2004-01-13 | Braodcom Corporation | Method and apparatus for high speed table search |
US7103053B2 (en) * | 2000-05-03 | 2006-09-05 | Broadcom Corporation | Gigabit switch on chip architecture |
US6826561B2 (en) * | 2000-05-22 | 2004-11-30 | Broadcom Corporation | Method and apparatus for performing a binary search on an expanded tree |
US7050430B2 (en) * | 2000-06-09 | 2006-05-23 | Broadcom Corporation | Gigabit switch with fast filtering processor |
US7126947B2 (en) * | 2000-06-23 | 2006-10-24 | Broadcom Corporation | Switch having external address resolution interface |
US6999455B2 (en) * | 2000-07-25 | 2006-02-14 | Broadcom Corporation | Hardware assist for address learning |
US7227862B2 (en) * | 2000-09-20 | 2007-06-05 | Broadcom Corporation | Network switch having port blocking capability |
US6988177B2 (en) * | 2000-10-03 | 2006-01-17 | Broadcom Corporation | Switch memory management using a linked list structure |
US6851000B2 (en) * | 2000-10-03 | 2005-02-01 | Broadcom Corporation | Switch having flow control management |
US7020166B2 (en) * | 2000-10-03 | 2006-03-28 | Broadcom Corporation | Switch transferring data using data encapsulation and decapsulation |
US7120155B2 (en) * | 2000-10-03 | 2006-10-10 | Broadcom Corporation | Switch having virtual shared memory |
US7274705B2 (en) * | 2000-10-03 | 2007-09-25 | Broadcom Corporation | Method and apparatus for reducing clock speed and power consumption |
US7420977B2 (en) * | 2000-10-03 | 2008-09-02 | Broadcom Corporation | Method and apparatus of inter-chip bus shared by message passing and memory access |
US6850542B2 (en) * | 2000-11-14 | 2005-02-01 | Broadcom Corporation | Linked network switch configuration |
US7035255B2 (en) | 2000-11-14 | 2006-04-25 | Broadcom Corporation | Linked network switch configuration |
US7035286B2 (en) * | 2000-11-14 | 2006-04-25 | Broadcom Corporation | Linked network switch configuration |
US7424012B2 (en) * | 2000-11-14 | 2008-09-09 | Broadcom Corporation | Linked network switch configuration |
US6813620B2 (en) * | 2001-03-07 | 2004-11-02 | Broadcom Corporation | Binary search engine and method |
US7355970B2 (en) | 2001-10-05 | 2008-04-08 | Broadcom Corporation | Method and apparatus for enabling access on a network switch |
JP3615189B2 (ja) * | 2002-02-08 | 2005-01-26 | 沖電気工業株式会社 | 入出力バッファ回路 |
US6996738B2 (en) * | 2002-04-15 | 2006-02-07 | Broadcom Corporation | Robust and scalable de-skew method for data path skew control |
US8190766B2 (en) * | 2002-05-09 | 2012-05-29 | Broadcom Corporation | Across-device communication protocol |
US6754744B2 (en) | 2002-09-10 | 2004-06-22 | Broadcom Corporation | Balanced linked lists for high performance data buffers in a network device |
US7184404B2 (en) * | 2002-10-15 | 2007-02-27 | Broadcom Corporation | Programmable inter-packet gap generator with byte granularity |
US6781898B2 (en) * | 2002-10-30 | 2004-08-24 | Broadcom Corporation | Self-repairing built-in self test for linked list memories |
US7132866B2 (en) * | 2003-09-03 | 2006-11-07 | Broadcom Corporation | Method and apparatus for glitch-free control of a delay-locked loop in a network device |
US7064592B2 (en) * | 2003-09-03 | 2006-06-20 | Broadcom Corporation | Method and apparatus for numeric optimization of the control of a delay-locked loop in a network device |
JP4919768B2 (ja) * | 2006-11-10 | 2012-04-18 | 株式会社東芝 | 集積回路装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6168796A (ja) * | 1985-09-04 | 1986-04-09 | Hitachi Ltd | 半導体記憶装置 |
DE69024109T2 (de) * | 1989-06-19 | 1996-07-11 | Nec Corp | Halbleiterspeicheranordnung mit einer verbesserten Schreibsteuerschaltung |
JP2534782B2 (ja) * | 1989-11-10 | 1996-09-18 | 株式会社東芝 | 半導体装置 |
US5155702A (en) * | 1990-11-30 | 1992-10-13 | Samsung Electronics Co., Ltd. | Semiconductor memory device |
-
1990
- 1990-12-12 JP JP2401583A patent/JPH04214290A/ja not_active Withdrawn
-
1991
- 1991-10-19 KR KR1019910018490A patent/KR950000959B1/ko not_active IP Right Cessation
- 1991-12-06 US US07/801,807 patent/US5278789A/en not_active Expired - Fee Related
- 1991-12-11 DE DE4140846A patent/DE4140846C2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR950000959B1 (ko) | 1995-02-06 |
DE4140846A1 (de) | 1992-06-17 |
JPH04214290A (ja) | 1992-08-05 |
DE4140846C2 (de) | 1995-07-06 |
US5278789A (en) | 1994-01-11 |
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