FR2316800A1 - Circuit de polarisation de substrat avec regulation de la tension de seuil - Google Patents

Circuit de polarisation de substrat avec regulation de la tension de seuil

Info

Publication number
FR2316800A1
FR2316800A1 FR7615576A FR7615576A FR2316800A1 FR 2316800 A1 FR2316800 A1 FR 2316800A1 FR 7615576 A FR7615576 A FR 7615576A FR 7615576 A FR7615576 A FR 7615576A FR 2316800 A1 FR2316800 A1 FR 2316800A1
Authority
FR
France
Prior art keywords
substrate
electrode
doped zone
voltage
polarization circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7615576A
Other languages
English (en)
French (fr)
Other versions
FR2316800B1 (enExample
Inventor
Dominic P Spampinato
Lewis M Terman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2316800A1 publication Critical patent/FR2316800A1/fr
Application granted granted Critical
Publication of FR2316800B1 publication Critical patent/FR2316800B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D44/00—Charge transfer devices
    • H10D44/40—Charge-coupled devices [CCD]
    • H10D44/45—Charge-coupled devices [CCD] having field effect produced by insulated gate electrodes 
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/282—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Element Separation (AREA)
FR7615576A 1975-06-30 1976-05-17 Circuit de polarisation de substrat avec regulation de la tension de seuil Granted FR2316800A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US59198575A 1975-06-30 1975-06-30

Publications (2)

Publication Number Publication Date
FR2316800A1 true FR2316800A1 (fr) 1977-01-28
FR2316800B1 FR2316800B1 (enExample) 1978-11-17

Family

ID=24368781

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7615576A Granted FR2316800A1 (fr) 1975-06-30 1976-05-17 Circuit de polarisation de substrat avec regulation de la tension de seuil

Country Status (4)

Country Link
JP (1) JPS525281A (enExample)
DE (1) DE2620973A1 (enExample)
FR (1) FR2316800A1 (enExample)
IT (1) IT1063327B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0012840A3 (en) * 1978-12-29 1980-09-17 International Business Machines Corporation Line-addressable memory with serial-parallel-serial configuration
EP1003224A1 (en) * 1994-07-15 2000-05-24 Sony Corporation Analogue MISFET with threshold voltage adjuster

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5758351A (en) * 1980-09-24 1982-04-08 Toshiba Corp Substrate biasing device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2200634A1 (enExample) * 1972-09-15 1974-04-19 Philips Nv

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2200634A1 (enExample) * 1972-09-15 1974-04-19 Philips Nv

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0012840A3 (en) * 1978-12-29 1980-09-17 International Business Machines Corporation Line-addressable memory with serial-parallel-serial configuration
EP1003224A1 (en) * 1994-07-15 2000-05-24 Sony Corporation Analogue MISFET with threshold voltage adjuster
US6198138B1 (en) 1994-07-15 2001-03-06 Sony Corporation Analogue misfet with threshold voltage adjuster

Also Published As

Publication number Publication date
FR2316800B1 (enExample) 1978-11-17
JPS525281A (en) 1977-01-14
IT1063327B (it) 1985-02-11
DE2620973A1 (de) 1977-01-27

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Legal Events

Date Code Title Description
ST Notification of lapse