FR2235493A1 - Integrated circuit for high speed switching - three zones with Schottky boundary between one pair - Google Patents

Integrated circuit for high speed switching - three zones with Schottky boundary between one pair

Info

Publication number
FR2235493A1
FR2235493A1 FR7422786A FR7422786A FR2235493A1 FR 2235493 A1 FR2235493 A1 FR 2235493A1 FR 7422786 A FR7422786 A FR 7422786A FR 7422786 A FR7422786 A FR 7422786A FR 2235493 A1 FR2235493 A1 FR 2235493A1
Authority
FR
France
Prior art keywords
zone
integrated circuit
high speed
speed switching
zones
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7422786A
Other languages
English (en)
French (fr)
Other versions
FR2235493B1 (enrdf_load_stackoverflow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of FR2235493A1 publication Critical patent/FR2235493A1/fr
Application granted granted Critical
Publication of FR2235493B1 publication Critical patent/FR2235493B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617Combinations of vertical BJTs and only diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR7422786A 1973-06-28 1974-06-28 Integrated circuit for high speed switching - three zones with Schottky boundary between one pair Granted FR2235493A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7318073A JPS5548705B2 (enrdf_load_stackoverflow) 1973-06-28 1973-06-28

Publications (2)

Publication Number Publication Date
FR2235493A1 true FR2235493A1 (en) 1975-01-24
FR2235493B1 FR2235493B1 (enrdf_load_stackoverflow) 1977-10-07

Family

ID=13510672

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7422786A Granted FR2235493A1 (en) 1973-06-28 1974-06-28 Integrated circuit for high speed switching - three zones with Schottky boundary between one pair

Country Status (6)

Country Link
JP (1) JPS5548705B2 (enrdf_load_stackoverflow)
CA (1) CA1002208A (enrdf_load_stackoverflow)
DE (1) DE2431011A1 (enrdf_load_stackoverflow)
FR (1) FR2235493A1 (enrdf_load_stackoverflow)
IT (1) IT1015565B (enrdf_load_stackoverflow)
NL (1) NL7408561A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52106528A (en) * 1976-03-03 1977-09-07 Nissan Motor Co Ltd Steering power control apparatus for power steering system
US4156246A (en) * 1977-05-25 1979-05-22 Bell Telephone Laboratories, Incorporated Combined ohmic and Schottky output transistors for logic circuit
GB2050694B (en) * 1979-05-07 1983-09-28 Nippon Telegraph & Telephone Electrode structure for a semiconductor device
US4982244A (en) * 1982-12-20 1991-01-01 National Semiconductor Corporation Buried Schottky clamped transistor
US5083185A (en) * 1985-02-15 1992-01-21 Agency Of Industrial Science & Technology, Ministry Of International Trade & Industry Surge absorption device
JPS61205153U (enrdf_load_stackoverflow) * 1986-06-12 1986-12-24
EP2896482A3 (en) 2014-01-15 2015-08-19 Paolo Ficai A finishing grinding wheel and a forming method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NEANT *

Also Published As

Publication number Publication date
JPS5548705B2 (enrdf_load_stackoverflow) 1980-12-08
JPS5023178A (enrdf_load_stackoverflow) 1975-03-12
NL7408561A (enrdf_load_stackoverflow) 1974-12-31
IT1015565B (it) 1977-05-20
CA1002208A (en) 1976-12-21
DE2431011A1 (de) 1975-01-30
FR2235493B1 (enrdf_load_stackoverflow) 1977-10-07

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Legal Events

Date Code Title Description
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