ES473937A1 - Mejoras en los dispositivos para tratamiento de datos. - Google Patents
Mejoras en los dispositivos para tratamiento de datos.Info
- Publication number
- ES473937A1 ES473937A1 ES473937A ES473937A ES473937A1 ES 473937 A1 ES473937 A1 ES 473937A1 ES 473937 A ES473937 A ES 473937A ES 473937 A ES473937 A ES 473937A ES 473937 A1 ES473937 A1 ES 473937A1
- Authority
- ES
- Spain
- Prior art keywords
- sent out
- data processing
- address register
- bits
- processing system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
Abstract
Mejoras en los dispositivos para tratamiento de datos, incluyendo una unidad de tratamiento de datos, poniendo un registro de dirección, cuyo número de bits es mayor que N, pero menor que 2N, una memoria y un colector de dirección de N-bit interconectando la unidad de tratamiento de datos y la memoria, caracterizadas porque el contenido del registro de dirección es emitido sobre el colector de dirección en dos etapas, emitiéndose primeramente N bits de orden superior del registro de dirección y después N bits de orden inferior.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12115477A JPS5454536A (en) | 1977-10-08 | 1977-10-08 | Data processor |
Publications (1)
Publication Number | Publication Date |
---|---|
ES473937A1 true ES473937A1 (es) | 1979-05-01 |
Family
ID=14804177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES473937A Expired ES473937A1 (es) | 1977-10-08 | 1978-10-04 | Mejoras en los dispositivos para tratamiento de datos. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4374410A (es) |
JP (1) | JPS5454536A (es) |
BR (1) | BR7806654A (es) |
ES (1) | ES473937A1 (es) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56117024A (en) * | 1980-02-19 | 1981-09-14 | Sanyo Electric Co Ltd | Flectronic oven |
JPS5764383A (en) * | 1980-10-03 | 1982-04-19 | Toshiba Corp | Address converting method and its device |
US4541045A (en) * | 1981-09-21 | 1985-09-10 | Racal-Milgo, Inc. | Microprocessor architecture employing efficient operand and instruction addressing |
JPS58149548A (ja) * | 1982-03-02 | 1983-09-05 | Hitachi Ltd | メモリ制御方式 |
US4602368A (en) * | 1983-04-15 | 1986-07-22 | Honeywell Information Systems Inc. | Dual validity bit arrays |
US4636942A (en) * | 1983-04-25 | 1987-01-13 | Cray Research, Inc. | Computer vector multiprocessing control |
US4661900A (en) * | 1983-04-25 | 1987-04-28 | Cray Research, Inc. | Flexible chaining in vector processor with selective use of vector registers as operand and result registers |
US4901230A (en) * | 1983-04-25 | 1990-02-13 | Cray Research, Inc. | Computer vector multiprocessing control with multiple access memory and priority conflict resolution method |
US4675808A (en) * | 1983-08-08 | 1987-06-23 | American Telephone And Telegraph Company At&T Bell Laboratories | Multiplexed-address interface for addressing memories of various sizes |
US4608632A (en) * | 1983-08-12 | 1986-08-26 | International Business Machines Corporation | Memory paging system in a microcomputer |
US4714993A (en) * | 1983-10-18 | 1987-12-22 | International Business Machines Corporation | Apparatus and method for effecting dynamic address translation in a microprocessor implemented data processing system |
US4779191A (en) * | 1985-04-12 | 1988-10-18 | Gigamos Systems, Inc. | Method and apparatus for expanding the address space of computers |
US4754398A (en) * | 1985-06-28 | 1988-06-28 | Cray Research, Inc. | System for multiprocessor communication using local and common semaphore and information registers |
US4745545A (en) * | 1985-06-28 | 1988-05-17 | Cray Research, Inc. | Memory reference control in a multiprocessor |
GB2211326B (en) * | 1987-10-16 | 1991-12-11 | Hitachi Ltd | Address bus control apparatus |
JPH0235551A (ja) * | 1988-07-26 | 1990-02-06 | Toshiba Corp | チャネル装置におけるアドレス変換方式 |
US5142638A (en) * | 1989-02-07 | 1992-08-25 | Cray Research, Inc. | Apparatus for sharing memory in a multiprocessor system |
US5119498A (en) * | 1989-06-12 | 1992-06-02 | International Business Machines Corporation | Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact |
US5581734A (en) * | 1993-08-02 | 1996-12-03 | International Business Machines Corporation | Multiprocessor system with shared cache and data input/output circuitry for transferring data amount greater than system bus capacity |
US5845098A (en) * | 1996-06-24 | 1998-12-01 | Motorola Inc. | Address lines load reduction |
JP3092557B2 (ja) * | 1997-09-16 | 2000-09-25 | 日本電気株式会社 | 半導体記憶装置 |
US9058292B2 (en) * | 2004-12-29 | 2015-06-16 | Intel Corporation | System and method for one step address translation of graphics addresses in virtualization |
JP2007172333A (ja) * | 2005-12-22 | 2007-07-05 | Sanyo Electric Co Ltd | バスアドレス選択回路およびバスアドレス選択方法 |
JP4984666B2 (ja) * | 2006-06-12 | 2012-07-25 | ソニー株式会社 | 不揮発性メモリ |
US8645596B2 (en) * | 2008-12-30 | 2014-02-04 | Intel Corporation | Interrupt techniques |
US7996548B2 (en) | 2008-12-30 | 2011-08-09 | Intel Corporation | Message communication techniques |
EP3396445B1 (en) | 2009-06-11 | 2020-12-30 | Switch Materials, Inc. | Variable transmittance optical filter and uses thereof |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3693165A (en) * | 1971-06-29 | 1972-09-19 | Ibm | Parallel addressing of a storage hierarchy in a data processing system using virtual addressing |
US3821715A (en) * | 1973-01-22 | 1974-06-28 | Intel Corp | Memory system for a multi chip digital computer |
JPS5615066B2 (es) * | 1974-06-13 | 1981-04-08 | ||
US3969706A (en) * | 1974-10-08 | 1976-07-13 | Mostek Corporation | Dynamic random access memory misfet integrated circuit |
JPS5540950B2 (es) * | 1974-11-30 | 1980-10-21 | ||
JPS52130532A (en) * | 1976-04-27 | 1977-11-01 | Fujitsu Ltd | Address conversion system |
JPS52149444A (en) * | 1976-06-08 | 1977-12-12 | Fujitsu Ltd | Multiplex virtual space processing data processing system |
JPS533029A (en) * | 1976-06-30 | 1978-01-12 | Toshiba Corp | Electronic computer |
DE2641722C3 (de) * | 1976-09-16 | 1981-10-08 | Siemens AG, 1000 Berlin und 8000 München | Hierarchisch geordnetes Speichersystem für eine datenverarbeitende Anlage mit virtueller Adressierung |
US4128875A (en) * | 1976-12-16 | 1978-12-05 | Sperry Rand Corporation | Optional virtual memory system |
US4155119A (en) * | 1977-09-21 | 1979-05-15 | Sperry Rand Corporation | Method for providing virtual addressing for externally specified addressed input/output operations |
-
1977
- 1977-10-08 JP JP12115477A patent/JPS5454536A/ja active Granted
-
1978
- 1978-10-04 ES ES473937A patent/ES473937A1/es not_active Expired
- 1978-10-06 BR BR7806654A patent/BR7806654A/pt unknown
-
1979
- 1979-08-08 US US06/064,725 patent/US4374410A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
BR7806654A (pt) | 1979-05-08 |
US4374410A (en) | 1983-02-15 |
JPS5454536A (en) | 1979-04-28 |
JPS5652386B2 (es) | 1981-12-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 19990210 |