ES431448A1 - Un aparato para facilitar una cooperacion entre un ordena- dor ejecutivo y un ordenador de reserva. - Google Patents

Un aparato para facilitar una cooperacion entre un ordena- dor ejecutivo y un ordenador de reserva.

Info

Publication number
ES431448A1
ES431448A1 ES431448A ES431448A ES431448A1 ES 431448 A1 ES431448 A1 ES 431448A1 ES 431448 A ES431448 A ES 431448A ES 431448 A ES431448 A ES 431448A ES 431448 A1 ES431448 A1 ES 431448A1
Authority
ES
Spain
Prior art keywords
computer
general
computers
executive
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES431448A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of ES431448A1 publication Critical patent/ES431448A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
ES431448A 1973-10-30 1974-10-29 Un aparato para facilitar una cooperacion entre un ordena- dor ejecutivo y un ordenador de reserva. Expired ES431448A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE7314713A SE369345B (cs) 1973-10-30 1973-10-30

Publications (1)

Publication Number Publication Date
ES431448A1 true ES431448A1 (es) 1976-09-01

Family

ID=20318960

Family Applications (1)

Application Number Title Priority Date Filing Date
ES431448A Expired ES431448A1 (es) 1973-10-30 1974-10-29 Un aparato para facilitar una cooperacion entre un ordena- dor ejecutivo y un ordenador de reserva.

Country Status (20)

Country Link
JP (1) JPS5826053B2 (cs)
BE (1) BE821638A (cs)
BR (1) BR7408994D0 (cs)
CA (1) CA1026871A (cs)
CH (1) CH593520A5 (cs)
CS (1) CS216670B2 (cs)
DD (1) DD115960A5 (cs)
DK (1) DK143819C (cs)
ES (1) ES431448A1 (cs)
FI (1) FI56456C (cs)
FR (1) FR2249388B1 (cs)
GB (1) GB1484331A (cs)
HU (1) HU170964B (cs)
IN (1) IN141771B (cs)
IT (1) IT1025327B (cs)
NL (1) NL188871C (cs)
NO (1) NO141282C (cs)
SE (1) SE369345B (cs)
SU (1) SU1068050A3 (cs)
YU (1) YU36232B (cs)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3416138A (en) * 1965-08-25 1968-12-10 Bell Telephone Labor Inc Data processor and method for operation thereof
DE2117128A1 (de) * 1971-04-07 1972-10-19 Siemens Ag Verfahren zum Ein- und Ausschalten von Systemeinheiten in einem modular aufgebauten Verarbeitungssystem
FR2182259A5 (cs) * 1972-04-24 1973-12-07 Cii

Also Published As

Publication number Publication date
CA1026871A (en) 1978-02-21
FI56456B (fi) 1979-09-28
FR2249388B1 (cs) 1978-08-11
IT1025327B (it) 1978-08-10
IN141771B (cs) 1977-04-16
JPS5826053B2 (ja) 1983-05-31
DK563174A (cs) 1975-06-30
BR7408994D0 (pt) 1975-08-26
SU1068050A3 (ru) 1984-01-15
SE369345B (cs) 1974-08-19
BE821638A (fr) 1975-02-17
FI299174A7 (cs) 1975-05-01
NL7413875A (nl) 1975-05-02
JPS5075751A (cs) 1975-06-21
DD115960A5 (cs) 1975-10-20
AU7453074A (en) 1976-04-29
CH593520A5 (cs) 1977-12-15
NL188871B (nl) 1992-05-18
YU287174A (en) 1981-04-30
NO141282C (no) 1980-02-06
NL188871C (nl) 1992-10-16
FR2249388A1 (cs) 1975-05-23
FI56456C (fi) 1980-01-10
DK143819C (da) 1982-03-29
GB1484331A (en) 1977-09-01
HU170964B (hu) 1977-10-28
NO141282B (no) 1979-10-29
YU36232B (en) 1982-02-25
CS216670B2 (en) 1982-11-26
DK143819B (da) 1981-10-12
NO743886L (cs) 1975-05-26

Similar Documents

Publication Publication Date Title
US3760369A (en) Distributed microprogram control in an information handling system
KR840002601A (ko) 상보형 트랜지스터 회로 및 그를 사용한 정보처리 장치
KR830009518A (ko) 병렬처리용(竝列處理用)데이터 처리 시스템
GB1129988A (en) Digital computers
US4386401A (en) High speed processing restarting apparatus
GB1077343A (en) Stored program data processing apparatus
KR850004679A (ko) 집적 데이타 처리기
ES444377A1 (es) Un aparato de tratamiento de datos.
US3900836A (en) Interleaved memory control signal handling apparatus using pipelining techniques
KR900012156A (ko) 공유 제어 기억부를 가진 멀티프로세서 제어기 및 그 동기화 방법
ES431448A1 (es) Un aparato para facilitar una cooperacion entre un ordena- dor ejecutivo y un ordenador de reserva.
GB1245042A (en) Data processing system
KR900018807A (ko) 마이크로 명령수식 기능을 가진 제어장치
ES447844A1 (es) Un computador para ejecutar instrucciones de tratamiento de datos sucesivamente obtenidas por una lectura de ciclo fijo.
JPS6232812B2 (cs)
Naur The design of the GIER ALGOL compiler Part II
GB1042709A (en) Apparatus for controlling the transfer of data from at least one peripheral device to a central processor
KR930020276A (ko) 클록 동기형 반도체 기억 장치 및 그 액세스 방법
SU384139A1 (ru) Автоматическая система для испытаний запоминающих устройств
JPS5525119A (en) Microprogram controller
SU1705825A2 (ru) Микропрограммное устройство управлени
JPS5679353A (en) Memory bus data transfer method of multiprocessor
JPS6454578A (en) Image arithmetic unit
SU1119020A1 (ru) Устройство управлени пам тью
SU860045A1 (ru) Устройство дл сопр жени