ES2883349T3 - Circuitos de entrada/salida aislados de descarga electrostática y método para proteger dichos circuitos - Google Patents
Circuitos de entrada/salida aislados de descarga electrostática y método para proteger dichos circuitos Download PDFInfo
- Publication number
- ES2883349T3 ES2883349T3 ES17704366T ES17704366T ES2883349T3 ES 2883349 T3 ES2883349 T3 ES 2883349T3 ES 17704366 T ES17704366 T ES 17704366T ES 17704366 T ES17704366 T ES 17704366T ES 2883349 T3 ES2883349 T3 ES 2883349T3
- Authority
- ES
- Spain
- Prior art keywords
- driver
- transistor
- circuit
- coupled
- esd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 27
- 230000000295 complement effect Effects 0.000 claims abstract description 16
- 230000005540 biological transmission Effects 0.000 claims abstract description 14
- 230000004044 response Effects 0.000 claims description 20
- 230000005669 field effect Effects 0.000 claims description 13
- 238000004891 communication Methods 0.000 claims description 8
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 16
- 238000013461 design Methods 0.000 description 14
- 230000001052 transient effect Effects 0.000 description 14
- 238000003860 storage Methods 0.000 description 12
- 230000008569 process Effects 0.000 description 11
- 239000003990 capacitor Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 9
- 230000015654 memory Effects 0.000 description 8
- 230000006870 function Effects 0.000 description 7
- 239000003989 dielectric material Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000000609 electron-beam lithography Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
- H02H9/046—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
- H03K19/018528—Interface arrangements of complementary type, e.g. CMOS with at least one differential stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018592—Coupling arrangements; Interface arrangements using field effect transistors only with a bidirectional operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/088,035 US10298010B2 (en) | 2016-03-31 | 2016-03-31 | Electrostatic discharge (ESD) isolated input/output (I/O) circuits |
| PCT/US2017/014949 WO2017172002A1 (en) | 2016-03-31 | 2017-01-25 | Electrostatic discharge (esd) isolated input/output (i/o) circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2883349T3 true ES2883349T3 (es) | 2021-12-07 |
Family
ID=58010398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES17704366T Active ES2883349T3 (es) | 2016-03-31 | 2017-01-25 | Circuitos de entrada/salida aislados de descarga electrostática y método para proteger dichos circuitos |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US10298010B2 (enExample) |
| EP (1) | EP3437193B1 (enExample) |
| JP (1) | JP6687753B2 (enExample) |
| KR (1) | KR102057111B1 (enExample) |
| CN (1) | CN108886363B (enExample) |
| BR (1) | BR112018069912B1 (enExample) |
| CA (1) | CA3016016C (enExample) |
| ES (1) | ES2883349T3 (enExample) |
| TW (1) | TWI672905B (enExample) |
| WO (1) | WO2017172002A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10936333B2 (en) | 2018-02-28 | 2021-03-02 | Forcepoint Llc | System and method for managing system configuration data models |
| CN110504251B (zh) * | 2018-05-18 | 2021-12-24 | 世界先进积体电路股份有限公司 | 集成电路以及静电放电保护电路 |
| US11088541B2 (en) | 2018-09-07 | 2021-08-10 | Vanguard International Semiconductor Corporation | Integrated circuit and electrostatic discharge protection circuit thereof |
| CN110137171B (zh) * | 2019-05-16 | 2024-07-19 | 北京集创北方科技股份有限公司 | 指纹传感装置及电子设备 |
| TWI706619B (zh) * | 2019-05-16 | 2020-10-01 | 大陸商北京集創北方科技股份有限公司 | 具增強靜電放電保護的指紋感測模塊及電子裝置 |
| DE102020132568A1 (de) * | 2020-03-31 | 2021-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Esd-schutzschaltung zum und zugehöriges betriebsverfahren |
| JP7408595B2 (ja) * | 2021-03-30 | 2024-01-05 | 株式会社東芝 | 保護回路 |
| CN113985163B (zh) * | 2021-10-15 | 2024-04-30 | 深圳市爱协生科技股份有限公司 | Esd检测电路、集成电路及电子设备 |
| CN116203308B (zh) * | 2021-11-30 | 2025-10-31 | 澜起科技股份有限公司 | 静电放电和电过载的探测电路 |
| US12439702B2 (en) | 2022-05-09 | 2025-10-07 | Nxp B.V. | Electrostatic discharge protection for wireless device |
| US11923764B1 (en) * | 2022-08-10 | 2024-03-05 | Texas Instruments Incorporated | Electrostatic discharge circuit for switching mode power supply |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5243623A (en) | 1990-09-25 | 1993-09-07 | National Semiconductor Corporation | Switchable multi-mode transceiver interface device |
| US5530612A (en) * | 1994-03-28 | 1996-06-25 | Intel Corporation | Electrostatic discharge protection circuits using biased and terminated PNP transistor chains |
| US5780897A (en) * | 1995-11-13 | 1998-07-14 | Digital Equipment Corporation | ESD protection clamp for mixed voltage I/O stages using NMOS transistors |
| US6785109B1 (en) | 2000-01-10 | 2004-08-31 | Altera Corporation | Technique for protecting integrated circuit devices against electrostatic discharge damage |
| US6624992B1 (en) | 2000-10-06 | 2003-09-23 | Qualcomm, Incorporated | Electro-static discharge protection circuit |
| US6552583B1 (en) | 2001-10-11 | 2003-04-22 | Pericom Semiconductor Corp. | ESD-protection device with active R-C coupling to gate of large output transistor |
| US7026848B2 (en) * | 2004-05-18 | 2006-04-11 | Rambus Inc. | Pre-driver circuit |
| US7221551B2 (en) * | 2004-06-11 | 2007-05-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cascaded gate-driven ESD clamp |
| US7102380B2 (en) * | 2004-07-07 | 2006-09-05 | Kao Richard F C | High speed integrated circuit |
| JP4986459B2 (ja) * | 2006-01-24 | 2012-07-25 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| KR20070115093A (ko) | 2006-05-30 | 2007-12-05 | 삼성전자주식회사 | 정전 방전 감지회로를 구비한 반도체 장치 |
| JP5053579B2 (ja) * | 2006-06-28 | 2012-10-17 | 寛治 大塚 | 静電気放電保護回路 |
| US7679878B2 (en) * | 2007-12-21 | 2010-03-16 | Broadcom Corporation | Capacitor sharing surge protection circuit |
| JP5363879B2 (ja) * | 2009-06-03 | 2013-12-11 | ルネサスエレクトロニクス株式会社 | ドライバ回路 |
| US8339757B2 (en) * | 2010-04-19 | 2012-12-25 | Faraday Technology Corp. | Electrostatic discharge circuit for integrated circuit with multiple power domain |
| US20130010266A1 (en) * | 2011-07-05 | 2013-01-10 | Projectiondesign As | Compact Projector Head |
| US8837564B2 (en) * | 2011-10-14 | 2014-09-16 | Broadcom Corporation | Multi gigabit modem for mmWave point to point links |
| US9001479B2 (en) * | 2012-02-07 | 2015-04-07 | Mediatek Inc. | ESD protection circuit |
| US8760828B2 (en) | 2012-03-08 | 2014-06-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Electro-static discharge clamp (ESD) for NxVDD power rail |
| US8724271B2 (en) * | 2012-03-08 | 2014-05-13 | Globalfoundries Singapore Pte. Ltd. | ESD-robust I/O driver circuits |
| US9219055B2 (en) | 2012-06-14 | 2015-12-22 | International Business Machines Corporation | Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers |
| DE102014102714A1 (de) * | 2014-02-28 | 2015-09-03 | Infineon Technologies Ag | Integrierte Schaltung mit ESD-Schutzstruktur und Photonenquelle |
| CN105099419B (zh) * | 2014-04-16 | 2018-06-22 | 钰太芯微电子科技（上海）有限公司 | 具有静电放电保护功能的功率芯片 |
| KR102140734B1 (ko) * | 2014-05-14 | 2020-08-04 | 삼성전자주식회사 | 정전 보호 회로를 포함하는 반도체 장치 및 그것의 동작 방법 |
-
2016
- 2016-03-31 US US15/088,035 patent/US10298010B2/en active Active
-
2017
- 2017-01-25 EP EP17704366.8A patent/EP3437193B1/en active Active
- 2017-01-25 KR KR1020187027960A patent/KR102057111B1/ko active Active
- 2017-01-25 JP JP2018550501A patent/JP6687753B2/ja active Active
- 2017-01-25 ES ES17704366T patent/ES2883349T3/es active Active
- 2017-01-25 WO PCT/US2017/014949 patent/WO2017172002A1/en not_active Ceased
- 2017-01-25 BR BR112018069912-8A patent/BR112018069912B1/pt active IP Right Grant
- 2017-01-25 CN CN201780019706.4A patent/CN108886363B/zh active Active
- 2017-01-25 CA CA3016016A patent/CA3016016C/en active Active
- 2017-02-17 TW TW106105244A patent/TWI672905B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| KR102057111B1 (ko) | 2019-12-18 |
| BR112018069912A2 (pt) | 2019-02-05 |
| TW201810949A (zh) | 2018-03-16 |
| BR112018069912B1 (pt) | 2023-12-26 |
| CA3016016C (en) | 2021-02-16 |
| CN108886363A (zh) | 2018-11-23 |
| KR20180127374A (ko) | 2018-11-28 |
| WO2017172002A1 (en) | 2017-10-05 |
| CA3016016A1 (en) | 2017-10-05 |
| JP6687753B2 (ja) | 2020-04-28 |
| EP3437193B1 (en) | 2021-07-28 |
| US10298010B2 (en) | 2019-05-21 |
| EP3437193A1 (en) | 2019-02-06 |
| CN108886363B (zh) | 2022-01-14 |
| TWI672905B (zh) | 2019-09-21 |
| US20170288398A1 (en) | 2017-10-05 |
| JP2019517127A (ja) | 2019-06-20 |
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