ES2146677T3 - Procesador de transporte inverso con circuito de direccionamiento de memoria. - Google Patents

Procesador de transporte inverso con circuito de direccionamiento de memoria.

Info

Publication number
ES2146677T3
ES2146677T3 ES95105541T ES95105541T ES2146677T3 ES 2146677 T3 ES2146677 T3 ES 2146677T3 ES 95105541 T ES95105541 T ES 95105541T ES 95105541 T ES95105541 T ES 95105541T ES 2146677 T3 ES2146677 T3 ES 2146677T3
Authority
ES
Spain
Prior art keywords
data
memory
payment
processors
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95105541T
Other languages
English (en)
Inventor
Kevin Elliot Bridgewater
Michael Scott Deiss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technicolor USA Inc
Original Assignee
Thomson Consumer Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26926333&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2146677(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Priority claimed from US08/232,789 external-priority patent/US5521979A/en
Priority claimed from US08/232,787 external-priority patent/US5475754A/en
Application filed by Thomson Consumer Electronics Inc filed Critical Thomson Consumer Electronics Inc
Application granted granted Critical
Publication of ES2146677T3 publication Critical patent/ES2146677T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/434—Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/16—Analogue secrecy systems; Analogue subscription systems
    • H04N7/162—Authorising the user terminal, e.g. by paying; Registering the use of a subscription channel, e.g. billing
    • H04N7/163—Authorising the user terminal, e.g. by paying; Registering the use of a subscription channel, e.g. billing by receiver means only

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Television Systems (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Television Signal Processing For Recording (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)

Abstract

UN SISTEMA PROCESADOR DE TRANSPORTE INVERSO PARA UN RECEPTOR DE TV DE SEÑALES DE PAQUETES DE TDM QUE INCLUYE UN APARATO PARA EXTRAER SELECTIVAMENTE LAS CARGAS DE PAGO DESEADAS DE LOS DATOS DE LOS COMPONENTES DE PROGRAMAS Y ACOPLAR ESTOS DATOS A UN PUERTO DE ENTRADA DE DATOS EN UNA MEMORIA INTERMEDIA. UN MICROPROCESADOR (19) ASOCIADO AL SISTEMA ACOPLA TAMBIEN LOS DATOS AL PUERTO DE ENTRADA DE DATOS A LA MEMORIA INTERMEDIA (18). LAS CARGAS DE PAGO DE LOS COMPONENTES RESPECTIVOS Y LOS DATOS GENERADOS POR EL MICROPROCESADOR QUEDAN ALMACENADOS EN UNOS BLOQUES RESPECTIVOS DE LA MEMORIA INTERMEDIA COMUN EN RESPUESTA A LAS DIRECCIONES DE MEMORIA QUE UN MULTIPLEXOR DE DIRECCIONES (17) APLICA A UN PUERTO DE ENTRADA DE DIRECCIONES DE MEMORIA. HAY UN DISPOSITIVO DE DESCIFRADO (16) PARA QUE DESCIFRE LOS DATOS SOBRE LAS CARGAS DE PAGO SEGUN UNAS CLAVES DE DESCIFRADO ESPECIFICAS DE PAQUETES. ADEMAS HAY UN DETECTOR (15) PARA QUE DETECTE LAS CARGAS DE PAGO QUE INCLUYEN DATOS DE TITULARIDAD. LAS CARGAS DE PAGO QUE CONTIENEN LOS DATOS DE TITULARIDAD SON DIRIGIDAS A TRAVES DE LA MEMORIA INTERMEDIA COMUN A UNA TARJETA CON MICROPROCESADOR QUE GENERA LAS CLAVES DE DESCIFRADO ESPECIFICAS DE LOS PAQUETES. HAY UN PUERTO DE SALIDA DE DATOS DE LA MEMORIA ACOPLADO A UN BUS QUE HAY INTERCONECTADO A LOS PROCESADORES DE LOS COMPONENTES DE PROGRAMAS RESPECTIVOS (21-24). SE ARBITRAN LA SENSIBILIDAD DE RESPUESTA LAS PETICIONES DE DATOS DE LOS PROCESADORES DE LOS COMPONENTES DE PROGRAMAS RESPECTIVOS Y LAS PETICIONES DE ESCRITURA DE DATOS DE LA FUENTE DE CARGA DE PAGO DE LOS COMPONENTES, EL ACCESO A MEMORIA PARA REALIZAR FUNCIONES DE LECTURA Y ESCRITURA (17) PARA QUE ASI NO SE PIERDA NINGUN DATO ENTRANTE SOBRE LOS PROGRAMAS Y SE PRESTE SERVICIO A TODOS LOS PROCESADORES DE COMPONENTES.
ES95105541T 1994-04-22 1995-04-12 Procesador de transporte inverso con circuito de direccionamiento de memoria. Expired - Lifetime ES2146677T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/232,789 US5521979A (en) 1994-04-22 1994-04-22 Packet video signal inverse transport system
US08/232,787 US5475754A (en) 1994-04-22 1994-04-22 Packet video signal inverse transport processor memory address circuitry

Publications (1)

Publication Number Publication Date
ES2146677T3 true ES2146677T3 (es) 2000-08-16

Family

ID=26926333

Family Applications (2)

Application Number Title Priority Date Filing Date
ES95105541T Expired - Lifetime ES2146677T3 (es) 1994-04-22 1995-04-12 Procesador de transporte inverso con circuito de direccionamiento de memoria.
ES99120648T Expired - Lifetime ES2183468T3 (es) 1994-04-22 1995-04-12 Procesador de transporte inverso con circuito de direccionamiento de memoria.

Family Applications After (1)

Application Number Title Priority Date Filing Date
ES99120648T Expired - Lifetime ES2183468T3 (es) 1994-04-22 1995-04-12 Procesador de transporte inverso con circuito de direccionamiento de memoria.

Country Status (13)

Country Link
EP (2) EP0971538B1 (es)
JP (2) JP3495454B2 (es)
KR (2) KR100343819B1 (es)
CN (2) CN1100438C (es)
BR (1) BR9501735A (es)
CA (1) CA2146472C (es)
DE (2) DE69529001T2 (es)
ES (2) ES2146677T3 (es)
HK (1) HK1018564A1 (es)
MY (2) MY121258A (es)
PT (2) PT679028E (es)
RU (1) RU2145728C1 (es)
TR (1) TR28547A (es)

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KR0166935B1 (ko) * 1994-11-23 1999-03-20 구자홍 엠펙2 트랜스포트 디코더 장치
KR100226528B1 (ko) * 1995-03-29 1999-10-15 가나이 쓰도무 다중화 압축화상/음성데이타의 복호장치
US5899578A (en) * 1995-12-25 1999-05-04 Sony Corporation Digital signal processor, processing method, digital signal recording/playback device and digital signal playback method
JP3269768B2 (ja) * 1996-01-16 2002-04-02 株式会社東芝 ディジタル信号受信装置
ES2333997T3 (es) * 1996-05-06 2010-03-03 Irdeto Eindhoven B.V. Acceso a informacion a traves de dispositivo de seguridad.
CA2204828C (en) * 1996-05-10 2004-11-23 Ray Nuber Error detection and recovery for high rate isochronous data in mpeg-2 data streams
FR2752350B1 (fr) * 1996-08-09 2001-06-08 Thomson Multimedia Sa Procede d'extraction de donnees dans un systeme de transmission cyclique et dispositif de mise en oeuvre
CA2216573C (en) * 1996-10-01 2006-03-14 Sony Corporation Digital tuner having ieee 1394 serial bus interface for providing a plurality of selected programs as a functional unit
US6226291B1 (en) * 1996-11-01 2001-05-01 Texas Instruments Incorporated Transport stream packet parser system
US6414726B1 (en) 1996-11-01 2002-07-02 Texas Instruments Incorporated Device for identifying packets of digital data and a receiver for digital television signals equipped with such a device
GB2329802B (en) * 1997-06-28 1999-08-18 United Microelectronics Corp Adaptive-selection method for memory access priority control in MPEG processor
EP0893913A1 (en) * 1997-07-24 1999-01-27 CANAL+ Société Anonyme Digital transport stream processing
EP1000510B1 (en) * 1997-08-01 2001-11-28 Scientific-Atlanta, Inc. Mechanism and apparatus for encapsulation of entitlement authorization in conditional access system
JP3578913B2 (ja) * 1997-09-29 2004-10-20 松下電器産業株式会社 データ一致検出装置，及びデータ選別装置
JP3389843B2 (ja) * 1997-10-17 2003-03-24 日本電気株式会社 情報処理装置におけるデジタル放送受信システム
NL1007453C2 (nl) * 1997-11-05 1999-05-07 United Microelectronics Corp Zich aanpassende kieswerkwijze voor het regelen van de geheugentoegangsprioriteit in een MPEG-processor.
US6621817B1 (en) 1999-07-06 2003-09-16 Texas Instruments Incorporated Transport packet parser
EP1096714A3 (en) * 1999-10-29 2003-04-09 Matsushita Electric Industrial Co., Ltd. Contents data conversion apparatus and method, and record medium storing contents data conversion program
WO2001037555A1 (fr) 1999-11-17 2001-05-25 Sony Corporation Procede et appareil pour le traitement de signaux numeriques et procede de creation d'une fonction d'extension
DE10035707A1 (de) * 2000-07-21 2002-01-31 Scm Microsystems Gmbh Digitales Aufnahme-und Weidergabeverfahren
DE60125297T2 (de) * 2000-09-27 2007-05-16 Texas Instruments Inc., Dallas Gerät und Verfahren für einen Sortierungmodus in einer Direktspeicherzugriffssteuerung von einer Einrichtung zur digitalen Signalverarbeitung
US6775254B1 (en) 2000-11-09 2004-08-10 Qualcomm Incorporated Method and apparatus for multiplexing high-speed packet data transmission with voice/data transmission
FR2819139B1 (fr) * 2001-01-03 2003-03-28 Canal Plus Technologies Procede et dispositif de gestion d'informations dans un systeme de communication interactif
US6868125B2 (en) * 2001-11-29 2005-03-15 Thomson Licensing S.A. Transport stream to program stream conversion
JP2003333024A (ja) * 2002-05-09 2003-11-21 Nec Corp 暗号化／復号化システム及びその暗号解読防止／改竄防止方法
US7213103B2 (en) 2004-04-22 2007-05-01 Apple Inc. Accessing data storage systems without waiting for read errors
US7366865B2 (en) * 2004-09-08 2008-04-29 Intel Corporation Enqueueing entries in a packet queue referencing packets
JP4667108B2 (ja) 2005-04-11 2011-04-06 パナソニック株式会社 データ処理装置
US7523146B2 (en) 2005-06-21 2009-04-21 Apple Inc. Apparatus and method for peer-to-peer N-way synchronization in a decentralized environment
US8495015B2 (en) 2005-06-21 2013-07-23 Apple Inc. Peer-to-peer syncing in a decentralized environment
JPWO2007099659A1 (ja) 2006-03-01 2009-07-16 パナソニック株式会社 データ転送装置及びデータ転送方法
US7797670B2 (en) 2006-04-14 2010-09-14 Apple Inc. Mirrored file system
US7860826B2 (en) 2006-08-04 2010-12-28 Apple Inc. Method and system for using global equivalency sets to identify data during peer-to-peer synchronization
US7657769B2 (en) 2007-01-08 2010-02-02 Marcy M Scott N-way synchronization of data
US7924456B1 (en) * 2007-01-12 2011-04-12 Broadbus Technologies, Inc. Data distribution and buffering
US7760562B2 (en) * 2008-03-13 2010-07-20 Qualcomm Incorporated Address multiplexing in pseudo-dual port memory
CN114595105B (zh) * 2022-05-09 2022-08-05 深圳佰维存储科技股份有限公司 Psn唯一性设计方法、装置、可读存储介质及电子设备

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Also Published As

Publication number Publication date
CA2146472C (en) 2007-10-09
TR28547A (tr) 1996-09-30
DE69529001T2 (de) 2003-10-09
JPH07297855A (ja) 1995-11-10
RU95106681A (ru) 1997-01-27
BR9501735A (pt) 1995-11-14
DE69529001D1 (de) 2003-01-09
HK1018564A1 (en) 1999-12-24
PT971538E (pt) 2003-03-31
DE69517240T2 (de) 2000-10-26
KR950035437A (ko) 1995-12-30
JP3690737B2 (ja) 2005-08-31
EP0679028A3 (en) 1996-04-24
DE69517240D1 (de) 2000-07-06
JP2002135739A (ja) 2002-05-10
CA2146472A1 (en) 1995-10-23
CN1208307A (zh) 1999-02-17
EP0679028B1 (en) 2000-05-31
CN1100438C (zh) 2003-01-29
KR100343821B1 (ko) 2002-07-20
CN1111867A (zh) 1995-11-15
EP0679028A2 (en) 1995-10-25
CN1113534C (zh) 2003-07-02
PT679028E (pt) 2000-11-30
EP0971538B1 (en) 2002-11-27
ES2183468T3 (es) 2003-03-16
EP0971538A3 (en) 2000-07-19
EP0971538A2 (en) 2000-01-12
RU2145728C1 (ru) 2000-02-20
KR100343819B1 (ko) 2002-11-30
JP3495454B2 (ja) 2004-02-09
MY121258A (en) 2006-01-28
MY115173A (en) 2003-04-30

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