ES2132514T3 - Procedimiento para la fabricacion de un panel de microondas multicapas, y panel obtenido por este procedimiento. - Google Patents

Procedimiento para la fabricacion de un panel de microondas multicapas, y panel obtenido por este procedimiento.

Info

Publication number
ES2132514T3
ES2132514T3 ES95200340T ES95200340T ES2132514T3 ES 2132514 T3 ES2132514 T3 ES 2132514T3 ES 95200340 T ES95200340 T ES 95200340T ES 95200340 T ES95200340 T ES 95200340T ES 2132514 T3 ES2132514 T3 ES 2132514T3
Authority
ES
Spain
Prior art keywords
procedure
panel
manufacture
multilayer microwave
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95200340T
Other languages
English (en)
Inventor
Edwin Johannes Hendr Hummelink
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales Nederland BV
Original Assignee
Thales Nederland BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales Nederland BV filed Critical Thales Nederland BV
Application granted granted Critical
Publication of ES2132514T3 publication Critical patent/ES2132514T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0379—Stacked conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07—Electric details
    • H05K2201/0707—Shielding
    • H05K2201/0715—Shielding provided by an outer layer of PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09718—Clearance holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0242—Cutting around hole, e.g. for disconnecting land or Plated Through-Hole [PTH] or for partly removing a PTH
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/171—Tuning, e.g. by trimming of printed components or high frequency circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047—Drilling of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

METODO PARA LA FABRICACION DE UN CARTON DE MICROONDAS MULTICAPA EN UNA OPERACION. CAPAS ATACADAS CON ACIDO IDIVIDUALMENTE (2,3,5,6) DE UN LAMINADO (1,4,10,12) TAL COMO DUROIDE, SE UNEN PARA FORMAR UN PAQUETE Y SE PERFORAN DESPUES DE LO CUAL SE CHAPEAN LOS AGUJERO RESULTANTES (9). A CONTINUACION, LAS CONEXIONES SUPERFLUAS (15,16) SE RETIRAN PERFORANDO DURANTE ESTE PROCESO CADA LINEA DE TRANSICION DE ESTRIA-TRANSICION DE COAXIL ENTERRADA EN EL PAQUETE SE MODULA POR UNA SELECCION CORRECTA DEL DIAMETRO DE PERFORACION Y LA PROFUNDIDAD DEL ORIFICIO.
ES95200340T 1994-02-22 1995-02-13 Procedimiento para la fabricacion de un panel de microondas multicapas, y panel obtenido por este procedimiento. Expired - Lifetime ES2132514T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL9400261A NL9400261A (nl) 1994-02-22 1994-02-22 Werkwijze voor het vervaardigen van een multilayer microwave board alsmede op deze wijze verkregen boards.

Publications (1)

Publication Number Publication Date
ES2132514T3 true ES2132514T3 (es) 1999-08-16

Family

ID=19863858

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95200340T Expired - Lifetime ES2132514T3 (es) 1994-02-22 1995-02-13 Procedimiento para la fabricacion de un panel de microondas multicapas, y panel obtenido por este procedimiento.

Country Status (6)

Country Link
US (1) US6233820B1 (es)
EP (1) EP0668713B1 (es)
CA (1) CA2142178C (es)
DE (1) DE69509423T2 (es)
ES (1) ES2132514T3 (es)
NL (1) NL9400261A (es)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10150308A (ja) * 1996-11-20 1998-06-02 Alps Electric Co Ltd 積層型電子部品
JP3366552B2 (ja) * 1997-04-22 2003-01-14 京セラ株式会社 誘電体導波管線路およびそれを具備する多層配線基板
US6189201B1 (en) * 1999-03-19 2001-02-20 Sino Dragon Inc. Method of tuning a high frequency printed resonance circuit
US6134117A (en) * 1999-04-16 2000-10-17 Delphi Technologies, Inc. Method for high resolution trimming of PCB components
US6747862B1 (en) * 2000-07-17 2004-06-08 Alcatel System and method for providing high voltage withstand capability between pins of a high-density compliant pin connector
EP1182913A1 (en) * 2000-08-25 2002-02-27 Agere Systems Guardian Corporation High speed circuit board interconnection
US6801880B2 (en) * 2002-07-02 2004-10-05 Dell Products L.P. System and method for minimizing a loading effect of a via by tuning a cutout ratio
US20050009415A1 (en) * 2003-02-27 2005-01-13 Johnson Morgan T. Cable and connector assemblies and methods of making same
US7388158B2 (en) * 2004-09-17 2008-06-17 Terdyne, Inc. Concentric spacer for reducing capacitive coupling in multilayer substrate assemblies
TWI389205B (zh) * 2005-03-04 2013-03-11 Sanmina Sci Corp 使用抗鍍層分隔介層結構
US9781830B2 (en) 2005-03-04 2017-10-03 Sanmina Corporation Simultaneous and selective wide gap partitioning of via structures using plating resist
US7291790B2 (en) * 2005-05-02 2007-11-06 Cisco Technology, Inc. Apertures for signal shaping using ground and signal PTH back-drilling
US20070089902A1 (en) * 2005-10-25 2007-04-26 Tourne Joseph A Circuit board having a multi-signal via
US7404251B2 (en) * 2006-04-18 2008-07-29 International Business Machines Corporation Manufacture of printed circuit boards with stubless plated through-holes
DE102007014355A1 (de) * 2007-03-26 2008-10-02 Robert Bosch Gmbh Verfahren zum Galvanisieren einer Leiterstruktur auf der Oberseite einer Mehrlagenleiterplatte und entsprechende Mehrlagenleiterplatte
US8158892B2 (en) * 2007-08-13 2012-04-17 Force10 Networks, Inc. High-speed router with backplane using muli-diameter drilled thru-holes and vias
US20090233461A1 (en) * 2008-03-17 2009-09-17 Tourne Joseph A A M Method of Manufacturing a Printed Circuit Board
CN101616541A (zh) * 2008-06-24 2009-12-30 华为技术有限公司 印制电路板及其制造方法、相关设备
JP7237572B2 (ja) * 2018-12-27 2023-03-13 京セラ株式会社 印刷配線板の製造方法及び複合印刷配線板の製造方法
JP2022128024A (ja) 2021-02-22 2022-09-01 株式会社東芝 基板、高周波回路、アンテナ装置、無線通信装置、および基板の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1552207A (es) * 1967-11-22 1969-01-03
FR2212740B1 (es) * 1972-12-28 1977-02-25 Honeywell Bull
US3895435A (en) * 1974-01-23 1975-07-22 Raytheon Co Method for electrically interconnecting multilevel stripline circuitry
AU506288B2 (en) * 1975-10-20 1979-12-20 Nippon Electric Co., Ltd Printed circuit board
US4468414A (en) * 1983-07-29 1984-08-28 Harris Corporation Dielectric isolation fabrication for laser trimming
US4916808A (en) * 1988-02-22 1990-04-17 Harris Corporation Process for fabricating a sculptured stripling interface conductor
US4975142A (en) * 1989-11-07 1990-12-04 General Electric Company Fabrication method for printed circuit board
JP3297447B2 (ja) * 1991-07-24 2002-07-02 松下電器産業株式会社 高周波多層回路基板調整法

Also Published As

Publication number Publication date
CA2142178A1 (en) 1995-08-23
EP0668713B1 (en) 1999-05-06
DE69509423D1 (de) 1999-06-10
CA2142178C (en) 2007-04-03
NL9400261A (nl) 1995-10-02
DE69509423T2 (de) 1999-11-25
US6233820B1 (en) 2001-05-22
EP0668713A1 (en) 1995-08-23

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