ES2081356T3 - Procedimiento de elaboracion de medios de conexiones electricas, en particular de sustratos de interconexion para circuitos hibridos. - Google Patents
Procedimiento de elaboracion de medios de conexiones electricas, en particular de sustratos de interconexion para circuitos hibridos.Info
- Publication number
- ES2081356T3 ES2081356T3 ES90400657T ES90400657T ES2081356T3 ES 2081356 T3 ES2081356 T3 ES 2081356T3 ES 90400657 T ES90400657 T ES 90400657T ES 90400657 T ES90400657 T ES 90400657T ES 2081356 T3 ES2081356 T3 ES 2081356T3
- Authority
- ES
- Spain
- Prior art keywords
- temperature
- ppm
- hybrid circuits
- elaboration
- procedure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R3/00—Electrically-conductive connections not otherwise provided for
- H01R3/08—Electrically-conductive connections not otherwise provided for for making connection to a liquid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
Abstract
PROCEDIMIENTO PARA LA ELABORACION DE MEDIOS DE CONEXIONES ELECTRICAS, EN ESPECIAL DE SUBSTRATOS DE INTERCONEXION PARA CIRCUITOS HIBRIDOS, SEGUN EL CUAL SE PROCEDE, DESPUES DE DEPOSITAR UNA CAPA DE TINTA CRUDA SOBRE UN SOPORTE DE ALTA DISIPACION TERMICA DEL TIPO NITRURO DE ALUMINIO, A UN SECADO PRELIMINAR DE ESTA TINTA, A UNA TEMPERATURA DEL ORDEN DE 100-150 (GRADOS) C, Y DESPUES A UNA COCHURA QUE COMPRENDE: A) UNA SUBIDA DE LA TEMPERATURA QUE INCORPORA UNA FASE DE ELIMINACION DE RESINAS POLIMERAS; B) UN MANTENIMIENTO DE CALCINACION A UNA TEMPERATURA DEL ORDEN DE 600-1000 (GRADOS) C; Y C) UN ENFRIAMIENTO TEMPORIZADO, CARACTERIZADO PORQUE LA ATMOSFERA DE LA FASE DE ELIMINACION DE LAS RESINAS POLIMERAS TIENE UN CONTENIDO EN OXIGENO COMPRENDIDO ENTRE 100 Y 5000 PPM, AUN CUANDO LOS CONTENIDOS EN OXIGENO DE LA ATMOSFERA DE CALCINACION A ALTA TEMPERATURA Y DE LA ATMOSFERA DE ENFRIAMIENTO DEBEN SER INFERIORES A 10 PPM APROXIMADAMENTE.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8903492A FR2644665B1 (fr) | 1989-03-16 | 1989-03-16 | Procede d'elaboration de moyens de connexions electriques, en particulier de substrats d'interconnexion pour circuits hybrides |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2081356T3 true ES2081356T3 (es) | 1996-03-01 |
Family
ID=9379778
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES90400657T Expired - Lifetime ES2081356T3 (es) | 1989-03-16 | 1990-03-13 | Procedimiento de elaboracion de medios de conexiones electricas, en particular de sustratos de interconexion para circuitos hibridos. |
Country Status (9)
Country | Link |
---|---|
US (1) | US5059450A (es) |
EP (1) | EP0388278B1 (es) |
JP (1) | JPH02284497A (es) |
KR (1) | KR900015378A (es) |
AT (1) | ATE132298T1 (es) |
CA (1) | CA2012178A1 (es) |
DE (1) | DE69024387T2 (es) |
ES (1) | ES2081356T3 (es) |
FR (1) | FR2644665B1 (es) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5302412A (en) * | 1989-02-03 | 1994-04-12 | The Boc Group, Inc. | Single atmosphere for firing compatible thick film material |
US5194294A (en) * | 1989-02-20 | 1993-03-16 | L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Process for preparing electrical connection means, in particular interconnection substances of hybrid circuits |
DE69121449T2 (de) * | 1990-04-12 | 1997-02-27 | Matsushita Electric Ind Co Ltd | Leitende Tintenzusammensetzung und Verfahren zum Herstellen eines dickschichtigen Musters |
FR2702920B1 (fr) * | 1993-03-18 | 1995-05-12 | Tekelec Airtronic Sa | Dispositif électronique miniaturisé, notamment dispositif à effet gyromagnétique. |
US6319843B1 (en) * | 1999-06-08 | 2001-11-20 | Advanced Micro Devices | Nitride surface passivation for acid catalyzed chemically amplified resist processing |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4388347A (en) * | 1980-11-11 | 1983-06-14 | Uop Inc. | Conductive pigment-coated surfaces |
US4540604A (en) * | 1983-08-25 | 1985-09-10 | E. I. Du Pont De Nemours And Company | Thick film conductor compositions |
US4514321A (en) * | 1983-08-25 | 1985-04-30 | E. I. Du Pont De Nemours And Company | Thick film conductor compositions |
US4627160A (en) * | 1985-08-02 | 1986-12-09 | International Business Machines Corporation | Method for removal of carbonaceous residues from ceramic structures having internal metallurgy |
US4622240A (en) * | 1985-11-12 | 1986-11-11 | Air Products And Chemicals, Inc. | Process for manufacturing thick-film electrical components |
US5077244A (en) * | 1986-08-13 | 1991-12-31 | Hitachi Metals, Ltd. | Aluminum nitride sintered body and semiconductor substrate thereof |
JPS6393193A (ja) * | 1986-10-07 | 1988-04-23 | 松下電器産業株式会社 | 銅導体厚膜回路基板の製造方法 |
-
1989
- 1989-03-16 FR FR8903492A patent/FR2644665B1/fr not_active Expired - Fee Related
-
1990
- 1990-03-13 AT AT90400657T patent/ATE132298T1/de active
- 1990-03-13 ES ES90400657T patent/ES2081356T3/es not_active Expired - Lifetime
- 1990-03-13 DE DE69024387T patent/DE69024387T2/de not_active Expired - Fee Related
- 1990-03-13 EP EP90400657A patent/EP0388278B1/fr not_active Expired - Lifetime
- 1990-03-14 CA CA002012178A patent/CA2012178A1/fr not_active Abandoned
- 1990-03-15 KR KR1019900003436A patent/KR900015378A/ko active IP Right Grant
- 1990-03-16 US US07/495,028 patent/US5059450A/en not_active Expired - Fee Related
- 1990-03-16 JP JP2064453A patent/JPH02284497A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2644665A1 (fr) | 1990-09-21 |
JPH02284497A (ja) | 1990-11-21 |
ATE132298T1 (de) | 1996-01-15 |
DE69024387D1 (de) | 1996-02-08 |
CA2012178A1 (fr) | 1990-09-16 |
EP0388278B1 (fr) | 1995-12-27 |
FR2644665B1 (fr) | 1996-05-03 |
KR900015378A (ko) | 1990-10-26 |
EP0388278A1 (fr) | 1990-09-19 |
US5059450A (en) | 1991-10-22 |
DE69024387T2 (de) | 1996-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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